scholarly journals A single power supply 0.1-3.5 GHz low noise amplifier design using a low cost 0.5 μm d-mode pHEMT process

2020 ◽  
Vol 33 (2) ◽  
pp. 317-326
Author(s):  
Denis Sotskov ◽  
Vadim Elesin ◽  
Alexander Kuznetsov ◽  
Nikolay Usachev ◽  
Nikita Zhidkov ◽  
...  
Keyword(s):  
Power Supply ◽  
Noise Figure ◽  
Low Cost ◽  
Wide Band ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Operating Frequency Range ◽  
Amplifier Design ◽  
Noise Amplifier ◽  
Single Power

Design and testing results of a single power supply wide-band low noise amplifier (LNA) based on low cost 0.5 ?m D-mode pHEMT process are presented. It is shown that the designed cascode LNA has operating frequency range up to 3.5 GHz, power gain above 15 dB, noise figure below 2.2 dB, output linearity above 17 dBm and power consumption less than 325 mW. Potential immunity of the LNA to total ionizing dose and destructive single event effects exceed 300 krad and 60 MeV?cm2/mg respectively.

scholarly journals A 0.18um CMOS Low Noise Amplifier for 3-5ghz UWB Receivers

2018 ◽  
Vol 7 (3.6) ◽  
pp. 84
Author(s):  
N Malika Begum ◽  
W Yasmeen
Keyword(s):  
Power Supply ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultra Wideband ◽  
Noise Amplifier ◽  
5 Ghz ◽  
Chebyshev Filter ◽  
Minimum Noise

This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.  

scholarly journals A 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Common Gate ◽  
Chip Size ◽  
Overall Performance ◽  
Amplifier Design ◽  
Noise Amplifier

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.

scholarly journals Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Active Inductor ◽  
Chip Area ◽  
Noise Amplifier

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  

scholarly journals Design of 10 to 12 GHz Low Noise Amplifier for Ultrawideband (UWB) Syste

2018 ◽  
Vol 8 (5) ◽  
pp. 2773
Author(s):  
Toulali Islam ◽  
Lahbib Zenkouar
Keyword(s):  
Return Loss ◽  
Noise Figure ◽  
Wide Band ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Unconditionally Stable ◽  
Branch Line ◽  
Noise Amplifier

<p>Balanced amplifier is the structure proposed in this article, it provides better performance. In fact, the single amplifier meets the specification for noise figure and gain but fails to meet the return loss specification due to the large mis-matches on the input &amp; outputs. To overcome this problem one solution is to use balanced amplifier topography. In this paper, a wide-band and highgain microwave balanced amplifier constituted with branch line coupler circuit is proposed. The amplifier is unconditionally stable in the band [9-13] GHz where the gain is about 20dB. The input reflection (S11) and output return loss (S22) at 11 GHz are -33.4dB and -33.5dB respectively.</p>

A Low Power SiGe-BiCMOS LNA for COMPASS Applications

2014 ◽  
Vol 513-517 ◽  
pp. 4580-4584
Author(s):  
Bing Liang Yu ◽  
Jin Li ◽  
Wen Yuan Li
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Power Gain ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Resistive Feedback ◽  
Noise Amplifier

A novel low-noise amplifier (LNA) suitable for COMPASS receiver applications is designed in SiGe-BiCMOS technology. Inductively degenerated technique and resistive feedback technique are employed to reduce the noise figure. With 1.8V power supply, the measured results achieve 17.23dB power gain and 2.58dB noise figure at 1.561GHz.

A 1.2 V CMOS COMMON-GATE LOW NOISE AMPLIFIER FOR UWB WIRELESS COMMUNICATIONS

2013 ◽  
Vol 22 (07) ◽  
pp. 1350052 ◽  
Author(s):  
HOSEIN ALAVI-RAD ◽  
SOHEYL ZIABAKHSH ◽  
MUSTAPHA C. E. YAGOUB
Keyword(s):  
Reflection Coefficient ◽  
Noise Figure ◽  
Supply Voltage ◽  
Wide Band ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultra Wide Band ◽  
Band Frequency ◽  
Common Gate ◽  
Noise Amplifier

In this paper, an ultra-wide band 0.18 μm CMOS common-gate low-noise amplifier (LNA) is presented. Designed in the ultra-wide band frequency range of 3.1–10.6 GHz, it uses a current-reused technique with modified input matching. This approach allowed obtaining a flat broadband gain of 12.75 ± 0.83 dB with an input reflection coefficient less than -5.5 dB, an output reflection coefficient less than -7 dB, and a noise figure less than 3.7 dB. Furthermore, the proposed low-power LNA consumes only 12.14 mW (excluding buffer) from a 1.2 V supply voltage.

scholarly journals Design and implementation of a broad-band high gain low noise amplifier for 3G/4G applications

2021 ◽  
Vol 23 (2) ◽  
pp. 725
Author(s):  
Ahmed M. Abdelmonem ◽  
Ahmed S. I. Amar ◽  
Amir Almslmany ◽  
Ibrahim L. Abdalla ◽  
Fathi A. Farag
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Low Cost ◽  
Broad Band ◽  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Matching Network ◽  
Noise Amplifier

The main aim of the paper is designing and implementing a broadband low-noise-amplifier (LNA) based on compensated matching network techniquein order to get high stable gain, low noise figure, low cost and smaller sizefor 3G/4G communication system applications at 2 GHz with bandwidth 600MHz. The Advanced Design System simulates the proposed circuit (ADS).The implementation was done with a class A bias circuit and a low noise transistor BFU 730F with a lower Noise Figure (NFmin) 0.62 dB. Collectorcurrent is measured to be 5.8mA and base current is 19.1μA with a supply voltage of 2.25V. The new design proposed a (NFmin) of 0.62 dB with a 17.8dB high stable amplifier gain. The microstrip lines (MSL) and compensated matching network techniques were used to improve the LNA’s stability and achieve a good result. The LNA board is implemented and assembled on the FR4 botton layer material. The results are virtually non existence equivalent between the simulated and the measured results.

scholarly journals Wide-band, high linear low noise amplifier design in 0.18um CMOS technology

2010 ◽  
Vol 7 (11) ◽  
pp. 759-764 ◽  
Author(s):  
Mousa M. Othman ◽  
Shuhei Amakawa ◽  
Noboru Ishihara ◽  
Kazuya Masu
Keyword(s):  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Amplifier Design ◽  
Noise Amplifier
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