scholarly journals An intelligent power MOSFET driver ASIC circuit with additional integrated safety operation functionality

2016 ◽  
Vol 29 (2) ◽  
pp. 193-204
Author(s):  
Jurij Podrzaj ◽  
Janez Trontelj

This paper presents an extension to the previously presented conference paper [1] a power MOSFET driver ASIC with intelligent driving algorithm approach of the power modern MOSFET devices. The intelligent driving algorithm concept proposes a realization of power MOSFET gate driving with controlled source/sink current of the power MOSFET driver circuit. Such approach enables higher control of the power MOSFET operation behavior, especially during switching events. Additionally to the previously published work this paper presents implementation of the intelligent driving algorithm and driver safety operation functions on a single integrated ASIC circuit. The paper concludes with presentation of some functions of the manufactured ASIC circuit in CMOS technology.

2015 ◽  
Vol 32 (2) ◽  
pp. 73-80 ◽  
Author(s):  
Soo-Woo Kim ◽  
Ho-Yong Choi ◽  
Sehyuk An ◽  
Nam-Soo Kim

Purpose – This paper aims to design the circuit for electromagnetic interface (EMI) reduction in liquid crystal display (LCD). Design/methodology/approach – The cascode level shifter and segmented driver circuit are applied in LCD column driver integrated circuit (IC) for EMI reduction. Cascode current mirror is used in the proposed level shifter for DC voltage biasing and reduction of the driving current which passes through the level shifter. The on-off switching currents and transient times are measured and compared between the conventional and proposed level shifters. Additionally, a segmented data latch is obtained by the timing spread solution in data latch, and applied to split the large peak switching current into a number of smaller peak current. The timing spread-operation does not actually reduce the total power of the noise, instead, it spreads the noise power evenly over the frequency bandwidth. The optimal number of latch is dependent on the operating frequency and EMI allowance. The column driver IC and clock controller are integrated in 0.18 μm CMOS technology with 1-poly and 4-metal process. Findings – The post-layout simulation shows that the proposed column driver circuit for LCD driver IC significantly reduces the peak switching current, and it results in the reduction of EMI noise level by more than 15 dB. It is obtained with 20 segmented operations in data latch at 40 MHz frequency. Originality/value – The advantage of the cascode current source is that it can provide a well-controlled bias current with an accurate current transfer ratio. To reduce the EMI noise in LCD driver circuit, the cascode current source is properly located for the DC bias block in the level shifter. The application is rarely done by others, and a significant EMI noise reduction is found. The well-controlled current source provides a high performance switching in the level shifter.


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