Design and Evaluation of a Clock Multiplexing Circuit for the SSRL Booster Accelerator Timing System - General Abstract
2019 ◽
Vol 35
(S1)
◽
pp. 19-19
2002 ◽
Vol 24
(2)
◽
pp. 49-50
2015 ◽
Vol 68
(10)
◽
pp. 1965-1980
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