scholarly journals An Efficient Architecture of Forward Transforms and Quantization for H.264/AVC Codecs

2011 ◽  
Vol 1 (2) ◽  
Author(s):  
Xuan-Tu Tran ◽  
Van-Huan Tran
Keyword(s):  
Video Compression ◽  
Mobile Applications ◽  
Hardware Implementation ◽  
Cmos Technology ◽  
Hardware Architecture ◽  
Hadamard Transform ◽  
Area Overhead ◽  
The Common ◽  
Access Requirement ◽  
Efficient Video

Thanks to many novel coding tools, H.264/AVC has become the most efficient video compression standard providing much better performance than previous standards. However, this standard comes with an extraordinary computational complexity and a huge memory access requirement, which make the hardware architecture design much more difficult and costly, especially for realtime applications. In the framework of H.264 codec hardware architecture project, this paper presents an efficient architecture of Forward Transform and Quantization (FTQ) for H.264/AVC codecs in mobile applications. To reduce the hardware implementation overhead, the proposed design uses only one unified architecture of 1-D transform engine to perform all required transform processes, including discrete cosine transform and Walsh Hadamard transform. This design also enables to share the common parts among multipliers that have the same multiplicands. The performance of the design is taken into consideration and improved by using a fast architecture of the multiplier in the quantizer, the most critical component in the design. Experimental results show that our architecture can completely finish transform and quantization processes for a 4:2:0 macroblock in 228 clock cycles and the achieved throughput is 445Msamples/s at 250MHz operating frequency while the area overhead is very small, 147755μm2 (approximate 15KGates), with the 130nm TSMC CMOS technology.

Efficient Video Compression Algorithm in Secure Image Communication

2019 ◽  
Author(s):  
Bernatin T ◽  
Godwin premi M.S. ◽  
Narmadha R ◽  
Sahaya Anselin Nisha A
Keyword(s):  
Video Compression ◽  
Compression Algorithm ◽  
Image Communication ◽  
Efficient Video

Hardware architecture of OFCE-HS for hardware implementation

2011 ◽  
Author(s):  
Ruzali Rustam ◽  
Nor Hisham Hamid ◽  
Fawnizu Azmadi Hussin
Keyword(s):  
Hardware Implementation ◽  
Hardware Architecture

Fully Differential Class-AB OTA with Improved CMRR

2017 ◽  
Vol 26 (11) ◽  
pp. 1750169 ◽  
Author(s):  
Francesco Centurelli ◽  
Pietro Monsurrò ◽  
Gaetano Parisi ◽  
Pasquale Tommasino ◽  
Alessandro Trifiletti
Keyword(s):  
Cmos Technology ◽  
Current Mirror ◽  
Differential Mode ◽  
Common Mode ◽  
Common Mode Rejection Ratio ◽  
Class Ab ◽  
Fully Differential ◽  
Rejection Ratio ◽  
Mode Behavior ◽  
The Common

This paper presents a fully differential class-AB current mirror OTA that improves the common-mode behavior of a topology that presents very good differential-mode performance but poor common-mode rejection ratio (CMRR). The proposed solution requires a low-current auxiliary circuit driven by the input signal, to compensate the effect of the common-mode input component. Simulations in 40-nm CMOS technology show a net reduction of common-mode gain of more than 90[Formula: see text]dB without affecting the differential-mode behavior; a sample-and-hold amplifier exploiting the proposed amplifier has also been simulated.

The Challenges of Compressing and Streaming Real Time Video Originating from Mobile Devices

2012 ◽  
pp. 1-24
Author(s):  
Ngozi V. Uti ◽  
Richard Fox
Keyword(s):  
Real Time ◽  
Mobile Devices ◽  
Video Compression ◽  
Mobile Phones ◽  
Cell Phone ◽  
Academic Research ◽  
Streaming Video ◽  
The World ◽  
Computational Resources ◽  
Efficient Video

In recent years, mobile phones have become the de facto system of communication across the planet. Mobile phones have helped increase economic growth and critical response in many parts of the world. Mobile phones are even being used for data transmission. However, little academic research has been done on the specific problem of streaming real time video originating from the cameras of mobile devices over cell phone networks. There are many factors that complicate this problem including the limited computational resources of mobile phones, the low and variable bandwidth of cell phone networks, and the need for video compression and streaming algorithms that can be supported by both the mobile phones and cell phone networks. This chapter examines the problems involved and discusses on-going research on the topic. The main goal of this chapter is to identify the real time constraints and challenges of compressing and streaming video from mobile devices for the purpose of designing efficient video compression and streaming techniques that are able to work within the constraints of the limited computational resources and bandwidth available to mobile devices.

scholarly journals Chip-to-Chip Authentication Method Based on SRAM PUF and Public Key Cryptography

2019 ◽  
Vol 3 (4) ◽  
pp. 382-396 ◽  
Author(s):  
Ioannis Karageorgos ◽  
Mehmet M. Isgenc ◽  
Samuel Pagliarini ◽  
Larry Pileggi
Keyword(s):  
Integrated Circuit ◽  
Hardware Implementation ◽  
State Of The Art ◽  
Public Key Cryptography ◽  
Cmos Technology ◽  
Performance Level ◽  
The Other ◽  
Public Key ◽  
Critical Systems ◽  
Software Vulnerabilities

AbstractIn today’s globalized integrated circuit (IC) ecosystem, untrusted foundries are often procured to build critical systems since they offer state-of-the-art silicon with the best performance available. On the other hand, ICs that originate from trusted fabrication cannot match the same performance level since trusted fabrication is often available on legacy nodes. Split-Chip is a dual-IC approach that leverages the performance of an untrusted IC and combines it with the guaranties of a trusted IC. In this paper, we provide a framework for chip-to-chip authentication that can further improve a Split-Chip system by protecting it from attacks that are unique to Split-Chip. A hardware implementation that utilizes an SRAM-based PUF as an identifier and public key cryptography for handshake is discussed. Circuit characteristics are provided, where the trusted IC is designed in a 28-nm CMOS technology and the untrusted IC is designed in an also commercial 16-nm CMOS technology. Most importantly, our solution does not require a processor for performing any of the handshake or cryptography tasks, thus being not susceptible to software vulnerabilities and exploits.

scholarly journals Learned Video Compression via Joint Spatial-Temporal Correlation Exploration

2020 ◽  
Vol 34 (07) ◽  
pp. 11580-11587
Author(s):  
Haojie Liu ◽  
Han Shen ◽  
Lichao Huang ◽  
Ming Lu ◽  
Tong Chen ◽  
...  
Keyword(s):  
Video Coding ◽  
Video Compression ◽  
High Efficiency ◽  
Temporal Correlation ◽  
Second Order ◽  
Compression Method ◽  
High Efficiency Video Coding ◽  
First Order ◽  
Coding Efficiency ◽  
The Common

Traditional video compression technologies have been developed over decades in pursuit of higher coding efficiency. Efficient temporal information representation plays a key role in video coding. Thus, in this paper, we propose to exploit the temporal correlation using both first-order optical flow and second-order flow prediction. We suggest an one-stage learning approach to encapsulate flow as quantized features from consecutive frames which is then entropy coded with adaptive contexts conditioned on joint spatial-temporal priors to exploit second-order correlations. Joint priors are embedded in autoregressive spatial neighbors, co-located hyper elements and temporal neighbors using ConvLSTM recurrently. We evaluate our approach for the low-delay scenario with High-Efficiency Video Coding (H.265/HEVC), H.264/AVC and another learned video compression method, following the common test settings. Our work offers the state-of-the-art performance, with consistent gains across all popular test sequences.

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