Comparison of Algorithms Used for Training of Artificial Neural Network Based Nonlinear Equalizer in a Coherent Optical Orthogonal Frequency Division Multiplexing System

2020 ◽  
Author(s):  
Gurpreet Kaur ◽  
Gurmeet Kaur
2018 ◽  
Vol 189 ◽  
pp. 04016
Author(s):  
Viet-Hung Nguyen ◽  
Minh-Tuan Nguyen ◽  
Yong-Hwa Kim

Orthogonal frequency division multiplexing (OFDM) is widely used in wired or wireless transmission systems. In the structure of OFDM, a cycle prefix (CP) has been exploited to avoid the effects of inter-symbol interference (ISI) and inter-carrier interference (ICI). This paper proposes a new approach to transmit the signals without CP transmission. Using the deep neural network, the proposed OFDM system transmits data without the CP. Simulation results show that the proposed scheme can estimate the CP at the receiver and overcome the effect of ISI.


2022 ◽  
Vol 15 (3) ◽  
pp. 1-25
Author(s):  
Stefan Brennsteiner ◽  
Tughrul Arslan ◽  
John Thompson ◽  
Andrew McCormick

Machine learning in the physical layer of communication systems holds the potential to improve performance and simplify design methodology. Many algorithms have been proposed; however, the model complexity is often unfeasible for real-time deployment. The real-time processing capability of these systems has not been proven yet. In this work, we propose a novel, less complex, fully connected neural network to perform channel estimation and signal detection in an orthogonal frequency division multiplexing system. The memory requirement, which is often the bottleneck for fully connected neural networks, is reduced by ≈ 27 times by applying known compression techniques in a three-step training process. Extensive experiments were performed for pruning and quantizing the weights of the neural network detector. Additionally, Huffman encoding was used on the weights to further reduce memory requirements. Based on this approach, we propose the first field-programmable gate array based, real-time capable neural network accelerator, specifically designed to accelerate the orthogonal frequency division multiplexing detector workload. The accelerator is synthesized for a Xilinx RFSoC field-programmable gate array, uses small-batch processing to increase throughput, efficiently supports branching neural networks, and implements superscalar Huffman decoders.


2000 ◽  
Vol 25 (4) ◽  
pp. 325-325
Author(s):  
J.L.N. Roodenburg ◽  
H.J. Van Staveren ◽  
N.L.P. Van Veen ◽  
O.C. Speelman ◽  
J.M. Nauta ◽  
...  

2004 ◽  
Vol 171 (4S) ◽  
pp. 502-503
Author(s):  
Mohamed A. Gomha ◽  
Khaled Z. Sheir ◽  
Saeed Showky ◽  
Khaled Madbouly ◽  
Emad Elsobky ◽  
...  

1998 ◽  
Vol 49 (7) ◽  
pp. 717-722 ◽  
Author(s):  
M C M de Carvalho ◽  
M S Dougherty ◽  
A S Fowkes ◽  
M R Wardman

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