Analysis of Deblocking Filter for Efficienct Video Coding by Various Multicore Processor Based on Paralliazation

2020 ◽  
Author(s):  
Burgoji santhosh kumar ◽  
Sudhir Kumar Sharma
Keyword(s):  
Video Coding ◽  
Deblocking Filter ◽  
Multicore Processor

Implementation of scalable video coding deblocking filter from high-level SystemC description

2013 ◽  
Author(s):  
Pedro P. Carballo ◽  
Omar Espino ◽  
Romén Neris ◽  
Pedro Hernández-Fernández ◽  
Tomasz M. Szydzik ◽  
...  
Keyword(s):  
Video Coding ◽  
Scalable Video Coding ◽  
Scalable Video ◽  
Deblocking Filter ◽  
High Level

Reliability-Based Deblocking Filter for Wyner-Ziv Video Coding

2016 ◽  
Vol 5 (2) ◽  
pp. 129-142 ◽  
Author(s):  
Khanh Quoc Dinh ◽  
Hiuk Jae Shim ◽  
Byeungwoo Jeon
Keyword(s):  
Video Coding ◽  
Deblocking Filter

Multi-Standards Deblocking Filter Based SIMD Technology

2013 ◽  
Vol 791-793 ◽  
pp. 1501-1505
Author(s):  
Tao Jia
Keyword(s):  
Parallel Computing ◽  
Video Coding ◽  
Real Time ◽  
Video Processing ◽  
Hardware Accelerators ◽  
Clock Frequency ◽  
Deblocking Filter ◽  
Filtering Algorithm ◽  
Filter Structure ◽  
Coding Standards

Due to real-time video decoding requirements, hardware accelerators for video deblocking filtering has gradually become a research hotspot in recent years. Compared with the traditional deblocking filter hardware accelerators which support only single video coding standard, this paper implemented a deblocking filter structure, which filtering algorithm can be configured to support multiple video coding standards; Using SIMD technology to make filtering data fully parallel computing. This structure is a multi-standard deblocking filter accelerator, supports H264, AVS, VP8 to, RealVideo, four kinds of video coding standards. The clock frequency is 200MHz, and it can be used for real-time filtering of multi-standard HD video processing. Deblocking Filter Algorithm

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