Low-Power VLSI Architectures for Error Control Coding and Wavelets

2001 ◽  
Author(s):  
Keshab K. Parhi
Keyword(s):  
Low Power ◽  
Error Control ◽  
Error Control Coding ◽  
Vlsi Architectures

Error control coding for mobile radio system

2003 ◽  
Author(s):  
V.K. Bhargava ◽  
T. Le-Ngoc ◽  
Y.R. Shayan
Keyword(s):  
Error Control ◽  
Mobile Radio ◽  
Error Control Coding ◽  
Radio System

scholarly journals Study of single event upsets (SEUS) a survey and analysis

2021 ◽  
Author(s):  
Sheldon Mark Foulds
Keyword(s):  
Error Control ◽  
Hamming Code ◽  
Single Event ◽  
Electronic Circuits ◽  
Error Control Coding ◽  
Computing Systems ◽  
Single Event Upsets ◽  
Triple Modular Redundancy ◽  
Radiation Induced ◽  
Modular Redundancy

Over the last few years evolution in electronics technology has led to the shrinkage of electronic circuits. While this has led to the emergence of more powerful computing systems it has also caused a dramatic increase in the occurrence of soft errors and a steady climb in failure in time (FIT) rates. This problem is most prevalent in FPGA based systems which are highly susceptible to radiation induced errors. Depending upon the severity of the problem a number of methods exist to counter these effects including Triple Modular Redundancy (TMR), Error Control Coding (ECC), scrubbing systems etc. The following project presents a simulation of an FPGA based system that employs one of the popular error control code techniques called the Hamming Code. A resulting analysis shows that Hamming Code is able to mitigate the effects of single event upsets (SEUs) but suffers due to a number of limitations.

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