Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits

2010 ◽  
Vol E93-A (2) ◽  
pp. 440-447 ◽  
Author(s):  
Tetsuro MATSUNO ◽  
Daisuke KOSAKA ◽  
Makoto NAGATA
Keyword(s):  
Digital Circuits ◽  
Noise Generation ◽  
Standard Cell ◽  
Power Noise

Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits

2012 ◽  
Vol E95.A (12) ◽  
pp. 2284-2291 ◽  
Author(s):  
Kumpei YOSHIKAWA ◽  
Yuta SASAKI ◽  
Kouji ICHIKAWA ◽  
Yoshiyuki SAITO ◽  
Makoto NAGATA
Keyword(s):  
Digital Circuits ◽  
Ac Power ◽  
Power Noise ◽  
On Chip

Emulation of high-frequency substrate noise generation in CMOS digital circuits

2014 ◽  
Vol 53 (4S) ◽  
pp. 04EE06
Author(s):  
Shunsuke Shimazaki ◽  
Shota Taga ◽  
Tetsuya Makita ◽  
Naoya Azuma ◽  
Noriyuki Miura ◽  
...  
Keyword(s):  
High Frequency ◽  
Digital Circuits ◽  
Noise Generation ◽  
Substrate Noise
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