scholarly journals A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18µm CMOS technology

2010 ◽  
Vol 7 (4) ◽  
pp. 308-313 ◽  
Author(s):  
B. Shammugasamy ◽  
T. Z. A. Zulkifli ◽  
H. Ramiah
Keyword(s):  
Cmos Technology ◽  
Active Inductor ◽  
Degeneration Techniques

scholarly journals Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Active Inductor ◽  
Chip Area ◽  
Noise Amplifier

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  

Design of an Active Inductor-Based T/R Switch in 0.13 μm CMOS Technology for 2.4 GHz RF Transceivers

2016 ◽  
Vol 17 (5) ◽  
pp. 261-269 ◽  
Author(s):  
Mohammad Arif Sobhan Bhuiyan ◽  
Mamun Bin Ibne Reaz ◽  
Md. Torikul Islam Badal ◽  
Md. Abdul Mukit ◽  
Noorfazila Kamal
Keyword(s):  
Cmos Technology ◽  
Active Inductor ◽  
Rf Transceivers

Tunable CMOS Active Inductor Using Widlar Current Source

2018 ◽  
Vol 28 (02) ◽  
pp. 1950027 ◽  
Author(s):  
Dhara P Patel ◽  
Shruti Oza-Rahurkar
Keyword(s):  
Quality Factor ◽  
Supply Voltage ◽  
Noise Analysis ◽  
Current Source ◽  
Cmos Technology ◽  
The Other ◽  
Active Inductor ◽  
Voltage Sensitivity ◽  
Current Mirror ◽  
Characterization Factors

A novel tuning principle for simple gyrator-based CMOS active inductor (AI) circuit is presented. The method makes use of Widlar current source to enhance the quality factor. The simulation of the proposed AI provides a maximum quality factor of 1819 at 2.88[Formula: see text]GHz. The AI shows the inductive bandwidth of 1.66[Formula: see text]GHz to 3.16[Formula: see text]GHz and power consumption of 6.87[Formula: see text]mW. The other characterization factors such as linearity, supply voltage sensitivity and noise analysis are discussed. The performance of the tunable AI using Widlar current source are compared with the same using a simple current mirror. An AI using a conventional current mirror (CCM) and Widlar current source have been implemented in the 0.18[Formula: see text][Formula: see text]m CMOS technology.

Designing LC VCOs Using Capacitive Degeneration Techniques

2005 ◽  
Vol 15 (02) ◽  
pp. 319-351 ◽  
Author(s):  
Byunghoo Jung ◽  
Ramesh Harjani
Keyword(s):  
High Frequency ◽  
Oscillation Frequency ◽  
Tuning Range ◽  
Cmos Technology ◽  
Negative Resistance ◽  
Wide Tuning Range ◽  
Test Vehicle ◽  
Bicmos Technology ◽  
Simulation Results ◽  
Degeneration Techniques

In this paper, we present a detailed analysis of VCOs using a capacitively degenerated negative resistance cell. The negative resistance cell using capacitive degeneration has a higher maximum attainable oscillation frequency and a smaller equivalent shunt capacitance when compared to the widely used cross-coupled negative-gm cell. These properties are of particular interest for the design of high-frequency and/or wide tuning range VCOs. The negative resistance provided by a traditional capacitively degenerated negative resistance cell is lower than that provided by a cross-coupled negative-gm cell. We present an active capacitive degeneration topology that overcomes this limitation. To validate this circuit topology we use two test vehicles. The first test vehicle is a 5.3 GHz VCO designed in a 0.25 μm CMOS technology and the second test vehicle is a 20 GHz VCO designed in a 0.25 μm BiCMOS technology. Measurement and simulation results from both test vehicles effectively demonstrate the efficacy of the capacitive degeneration technique.

scholarly journals A Wide Tuning-Range CMOS VCO with a Tunable Active Inductor

2015 ◽  
Vol 2015 ◽  
pp. 1-7 ◽  
Author(s):  
Hsuan-Ling Kao ◽  
Ping-Che Lee ◽  
Hsien-Chin Chiu
Keyword(s):  
Degrees Of Freedom ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Feedback Loops ◽  
Fine Tuning ◽  
Active Inductor ◽  
Frequency Range ◽  
Wide Tuning Range ◽  
Output Frequency

This study describes a wide tuning-range VCO using tunable active inductor (TAI) topology and cross-coupled pair configuration for radio frequency operation. The TAI used two feedback loops to form a cascode circuit to obtain more degrees of freedom for inductance value. The TAI-VCO was fabricated using a 0.18 μm CMOS technology. The coarse frequency tuning is achieved by TAIs while the fine tuning is controlled by varactors. The fabricated circuit provides an output frequency range from 0.6 to 7.2 GHz (169%). The measured phase noise is from −110.38 to −86.01 dBc/Hz at a 1 MHz offset and output power is from −11.11 to −3.89 dBm within the entire frequency range under a 1.8 V power supply.

Design and simulation of differential active inductor with 0.18 um CMOS Technology

2011 ◽  
Author(s):  
Komeil Rasouli ◽  
Akram Nouri ◽  
Masoud Sabaghi ◽  
A.M. Kordalivand ◽  
Mahmoud Azmodeh Far
Keyword(s):  
Cmos Technology ◽  
Active Inductor
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