scholarly journals Design of broadband high-efficiency power amplifier based on elliptic low-pass and band-pass matching network

2019 ◽  
Vol 16 (19) ◽  
pp. 20190455-20190455
Author(s):  
Ming-Zhe Zhang ◽  
Xiang-Dong Huang
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Matching Network ◽  
Low Pass ◽  
Band Pass

An X-Band Broadband High-Efficiency Power Amplifier with Class-J Mode Matching Network

2021 ◽  
Author(s):  
Ping Zhang ◽  
Xiuping Li ◽  
Zemeng Huang ◽  
Yubing Li ◽  
Tao Tan ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Mode Matching ◽  
Matching Network ◽  
X Band

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

scholarly journals High efficiency Doherty power amplifier based on asymmetrical matching network

2021 ◽  
Vol 23 (2) ◽  
pp. 910
Author(s):  
Mussa Mabrok ◽  
Zahriladha Zakaria ◽  
Tole Sutikno
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Communication Systems ◽  
High Efficiency ◽  
Design Strategy ◽  
Matching Network ◽  
High Data ◽  
Fifth Generation ◽  
Data Rates ◽  
Doherty Power Amplifier

Doherty power amplifier (DPA) with high efficiency at the output power back off is highly demanded for modern wireless communication systems to achieve high data rates and reduce the power consumption and operation costs. This paper presents a new design strategy for enhancing DPA’s back-off efficiency. New design strategy called asymmetrical matching network is used to achieve asymmetric operation, which helps to compensate for the low power delivered by the peaking stage in the conventional DPA. The simulation results showed an enhancement in the back-off efficiency, where the proposed design is able toachieve 46-52% drain efficiency at 8 dB output power back-off while maintains high efficiency of 73-80 % at saturation over the designed bandwidth of 3.4-3.6 GHz. The proposed design is suitable for high efficiency sub-6 GHz fifth-generation wireless applications.<br /><div> </div>

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