scholarly journals An efficient background timing skew calibration technique for time-interleaving analog-to-digital converters

2019 ◽  
Vol 16 (15) ◽  
pp. 20190352-20190352
Author(s):  
Yu Cao ◽  
Peng Miao ◽  
Fei Li ◽  
Huan Wang
Keyword(s):  
Analog To Digital Converters ◽  
Time Interleaving ◽  
Calibration Technique ◽  
Analog To Digital ◽  
Timing Skew

An adaptive calibration technique of timing skew mismatch in time-interleaved analog-to-digital converters

2019 ◽  
Vol 90 (2) ◽  
pp. 025102 ◽  
Author(s):  
Jian Gao ◽  
Peng Ye ◽  
Hao Zeng ◽  
Jinpeng Song ◽  
Wentao Wei ◽  
...  
Keyword(s):  
Analog To Digital Converters ◽  
Calibration Technique ◽  
Analog To Digital ◽  
Adaptive Calibration ◽  
Time Interleaved ◽  
Timing Skew

scholarly journals An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 73
Author(s):  
Van-Thanh Ta ◽  
Van-Phuc Hoang ◽  
Van-Phu Pham ◽  
Cong-Kha Pham
Keyword(s):  
Communication Systems ◽  
High Speed ◽  
Dynamic Range ◽  
Analog To Digital Converters ◽  
Background Calibration ◽  
Calibration Technique ◽  
Analog To Digital ◽  
Digital Background Calibration ◽  
Field Programmable ◽  
Time Interleaved

The time-interleaved analog-to-digital converters (TIADCs), performance is seriously affected by channel mismatches, especially for the applications in the next-generation communication systems. This work presents an improved all-digital background calibration technique for TIADCs by combining the Hadamard transform for calibrating gain and timing mismatches and averaging for offset mismatch cancellation. The numerical simulation results show that the proposed calibration technique completely suppresses the spurious images due to the channel mismatches at the output spectrum, which increases the spurious-free dynamic range (SFDR) and signal-to-noise and distortion ratio (SNDR) by 74 dB and 43.7 dB, respectively. Furthermore, the hardware co-simulation on the field programmable gate array (FPGA) platform is performed to confirm the effectiveness of the proposed calibration technique. The simulation and experimental results clarify the improvement of the proposed calibration technique in the TIADC’s performance.

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