(Selective) Epitaxial Growth of Strained Si to Fabricate Low Cost and High Performance CMOS Devices

2004 ◽  
Vol 809 ◽  
Author(s):  
R. Loo ◽  
R. Delhougne ◽  
P. Meunier-Beillard ◽  
M. Caymax ◽  
P. Verheyen ◽  
...  
Keyword(s):  
High Performance ◽  
Low Cost ◽  
Chemical Vapor ◽  
Sige Layer ◽  
Device Fabrication ◽  
Selective Growth ◽  
Constant Composition ◽  
Strained Si ◽  
Process Modification ◽  
Thin Carbon

ABSTRACTTensile strained Si on SiGe Strain Relaxed Buffers (SRB) is an interesting candidate to increase both electron and hole mobility which results in improved device performance. Most of this work was/is based on thick (several μm), step-graded SRBs with or without Chemical Mechanical Polishing (CMP) planarisation. This approach bears several disadvantages such as issues with STI formation in the thick SiGe structure, and considerable self-heating effects due to the lower thermal conductivity of the SiGe material. Further, pMOS improvement requires SRBs with high Ge contents (> 30 %), which complicates device fabrication even more. To overcome these issues, we developed a new and cost efficient type of thin SRB (∼200 nm). The concept is based on the introduction of a thin carbon-containing layer during growth of a constant composition SiGe layer. The process relies on standard Chemical Vapor Deposition epitaxial technology without need for CMP. It is designed to allow both non-selective growth on blanket wafers and selective growth in the active area of structured wafers with Shallow Trench Isolation (STI). The selective epitaxial process for strained Si on thin SRBs proposed here, allows relatively simple and cost-effective fabrication of strained Si layers on existing STI structures without any process modification. Further, it offers a very flexible fabrication scheme to independently improve nMOS and pMOS devices. The SRB quality is comparable to the best reported in literature so far, with 70 % and 53 % mobility enhancements for long channel nMOSFETs on 22 % Ge SRBs grown on blanket and STI patterned wafers, respectively.

Low-Temperature Growth of Epitaxial Semiconductor Nanostructures and Films

2011 ◽  
Vol 1308 ◽  
Author(s):  
Alp T. Findikoglu ◽  
Daniel E. Perea ◽  
S. T. Picraux
Keyword(s):  
Low Temperatures ◽  
High Performance ◽  
Low Cost ◽  
Ion Beam ◽  
Chemical Vapor ◽  
Catalyst Layer ◽  
Semiconductor Nanostructures ◽  
Device Fabrication ◽  
Single Crystalline ◽  
Glass Substrates

ABSTRACTThe growth of epitaxial semiconductor nanostructures and films at low temperatures is important for semiconductor technology because it allows the possibility of monolithically integrating different high-performance single-crystalline semiconductor structures directly onto low cost technologically important substrates. At sufficiently low temperatures this can enable, for example, Si or Ge device fabrication on flexible substrates such as plastics. We have studied the reduced-temperature liquid-mediated growth of Ge nanostructures and films on crystalline template layers on non-single-crystalline substrates in a low-pressure chemical vapor deposition (LPCVD) system. The heteroepitaxial process is implemented by the Au seeded vapor-liquidsolid (VLS) catalytic growth technique with germane below 400 ºC. Crystalline template layers were prepared with ion-beam-assisted-deposition (IBAD) texturing and electron-beam evaporation on glass substrates. A thin layer of e-beam evaporated Au forms the catalyst layer, upon which we grew Ge films at 386 ºC. Scanning electron microscopy and x-ray diffraction results indicated that both Ge islands and nanowires grew heteroepitaxially on the crystalline template layers on glass substrates with good alignment over large areas.

scholarly journals Bio-Separated and Gate-Free 2D MoS2 Biosensor Array for Ultrasensitive Detection of BRCA1

Nanomaterials ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 545
Author(s):  
Yi Zhang ◽  
Wei Jiang ◽  
Dezhi Feng ◽  
Chenguang Wang ◽  
Yi Xu ◽  
...  
Keyword(s):  
High Performance ◽  
Low Cost ◽  
Chemical Vapor ◽  
Signal Interference ◽  
Ultrasensitive Detection ◽  
Chemical Vapor Deposition Growth ◽  
Biosensor Array ◽  
Growth Method ◽  
Biological Modification ◽  
Biological Solutions

2D molybdenum disulfide (MoS2)-based thin film transistors are widely used in biosensing, and many efforts have been made to improve the detection limit and linear range. However, in addition to the complexity of device technology and biological modification, the compatibility of the physical device with biological solutions and device reusability have rarely been considered. Herein, we designed and synthesized an array of MoS2 by employing a simple-patterned chemical vapor deposition growth method and meanwhile exploited a one-step biomodification in a sensing pad based on DNA tetrahedron probes to form a bio-separated sensing part. This solves the signal interference, solution erosion, and instability of semiconductor-based biosensors after contacting biological solutions, and also allows physical devices to be reused. Furthermore, the gate-free detection structure that we first proposed for DNA (BRCA1) detection demonstrates ultrasensitive detection over a broad range of 1 fM to 1 μM with a good linear response of R2 = 0.98. Our findings provide a practical solution for high-performance, low-cost, biocompatible, reusable, and bio-separated biosensor platforms.

scholarly journals 2D MoS2 Encapsulated Silicon Nanopillar Array with High-Performance Light Trapping Obtained by Direct CVD Process

Crystals ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 267
Author(s):  
Minyu Bai ◽  
Zhuoman Wang ◽  
Jijie Zhao ◽  
Shuai Wen ◽  
Peiru Zhang ◽  
...  
Keyword(s):  
Silicon Substrate ◽  
High Performance ◽  
Low Cost ◽  
Light Trapping ◽  
Incident Light ◽  
Single Layer ◽  
Chemical Vapor ◽  
Optoelectronic Device ◽  
Planar Silicon ◽  
Shortwave Infrared

Weak absorption remains a vital factor that limits the application of two-dimensional (2D) materials due to the atomic thickness of those materials. In this work, a direct chemical vapor deposition (CVD) process was applied to achieve 2D MoS2 encapsulation onto the silicon nanopillar array substrate (NPAS). Single-layer 2D MoS2 monocrystal sheets were obtained, and the percentage of the encapsulated surface of NPAS was up to 80%. The reflection and transmittance of incident light of our 2D MoS2-encapsulated silicon substrate within visible to shortwave infrared were significantly reduced compared with the counterpart planar silicon substrate, leading to effective light trapping in NPAS. The proposed method provides a method of conformal deposition upon NPAS that combines the advantages of both 2D MoS2 and its substrate. Furthermore, the method is feasible and low-cost, providing a promising process for high-performance optoelectronic device development.

The Effect of Strain on the Formation of Dislocations at the SiGe/Si Interface

MRS Bulletin ◽  
1996 ◽  
Vol 21 (4) ◽  
pp. 38-44 ◽  
Author(s):  
F.K. LeGoues
Keyword(s):  
Metal Oxide ◽  
High Speed ◽  
High Performance ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Design Rule ◽  
Strained Si

Recently much interest has been devoted to Si-based heteroepitaxy, and in particular, to the SiGe/Si system. This is mostly for economical reasons: Si-based technology is much more advanced, is widely available, and is cheaper than GaAs-based technology. SiGe opens the door to the exciting (and lucrative) area of Si-based high-performance devices, although optical applications are still limited to GaAs-based technology. Strained SiGe layers form the base of heterojunction bipolar transistors (HBTs), which are currently used in commercial high-speed analogue applications. They promise to be low-cost compared to their GaAs counterparts and give comparable performance in the 2-20-GHz regime. More recently we have started to investigate the use of relaxed SiGe layers, which opens the door to a wider range of application and to the use of SiGe in complementary metal oxide semiconductor (CMOS) devices, which comprise strained Si and SiGe layers. Some recent successes include record-breaking low-temperature electron mobility in modulation-doped layers where the mobility was found to be up to 50 times better than standard Si-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Even more recently, SiGe-basedp-type MOSFETS were built with oscillation frequency of up to 50 GHz, which is a new record, in anyp-type material for the same design rule.

Low Cost Environmental Sensors Using Zinc Oxide Nanowires and Nanostructures

2012 ◽  
Vol 1439 ◽  
pp. 139-144 ◽  
Author(s):  
Nima Mohseni Kiasari ◽  
Saeid Soltanian ◽  
Bobak Gholamkhass ◽  
Peyman Servati
Keyword(s):  
Zinc Oxide ◽  
Metal Oxide ◽  
High Performance ◽  
Low Cost ◽  
Chemical Vapor ◽  
Environmental Sensors ◽  
X Ray Diffraction ◽  
Zinc Oxide Nanowires ◽  
Oxide Nanowires ◽  
Current Voltage

ABSTRACTZinc oxide (ZnO) nanowires (NW) are grown on both silicon and sapphire substrates using conventional chemical vapor deposition (CVD) system. As-grown nanostructures are characterized by scanning electron microscope (SEM), X-ray diffraction (XRD) as well as energy dispersive spectroscopy (EDS) and the results confirm high-quality c-axis growth of single-crystalline zinc oxide nanowires. Nanowire are dispersed in solvent and then placed between micro-patterned gold electrodes fabricated on silicon wafers using low cost and scalable dielectrophoresis (DEP) process for fabrication of oxygen and humidity sensors. These sensors are characterized in a vacuum chamber connected to a semiconductor analyzer. Current-voltage characteristics of each device are systematically investigated under different hydrostatic pressure of various gaseous environments such as nitrogen, argon, dry and humid air. It is observed that the electrical conductivity of the nanowires is significantly dependent on the number of oxygen and water molecules adsorbed to the surface of the metal oxide nanowire. These results are critical for development of low cost metal oxide sensors for high performance ubiquitous environmental sensors of oxygen and humidity.

scholarly journals III–V Nanowires: Synthesis, Property Manipulations, and Device Applications

2014 ◽  
Vol 2014 ◽  
pp. 1-14 ◽  
Author(s):  
Ming Fang ◽  
Ning Han ◽  
Fengyun Wang ◽  
Zai-xing Yang ◽  
SenPo Yip ◽  
...  
Keyword(s):  
High Performance ◽  
Low Cost ◽  
Volume Ratio ◽  
Chemical Vapor ◽  
Cost Effective ◽  
Research Field ◽  
Synthesis Methods ◽  
Comprehensive Overview ◽  
Device Applications ◽  
Property Control

III–V semiconductor nanowire (NW) materials possess a combination of fascinating properties, including their tunable direct bandgap, high carrier mobility, excellent mechanical flexibility, and extraordinarily large surface-to-volume ratio, making them superior candidates for next generation electronics, photonics, and sensors, even possibly on flexible substrates. Understanding the synthesis, property manipulation, and device integration of these III–V NW materials is therefore crucial for their practical implementations. In this review, we present a comprehensive overview of the recent development in III–V NWs with the focus on their cost-effective synthesis, corresponding property control, and the relevant low-operating-power device applications. We will first introduce the synthesis methods and growth mechanisms of III–V NWs, emphasizing the low-cost solid-source chemical vapor deposition (SSCVD) technique, and then discuss the physical properties of III–V NWs with special attention on their dependences on several typical factors including the choice of catalysts, NW diameters, surface roughness, and surface decorations. After that, we present several different examples in the area of high-performance photovoltaics and low-power electronic circuit prototypes to further demonstrate the potential applications of these NW materials. Towards the end, we also make some remarks on the progress made and challenges remaining in the III–V NW research field.

scholarly journals High-Sensitivity Flexible Pressure Sensor-Based 3D CNTs Sponge for Human–Computer Interaction

Polymers ◽  
2021 ◽  
Vol 13 (20) ◽  
pp. 3465
Author(s):  
Jianli Cui ◽  
Xueli Nan ◽  
Guirong Shao ◽  
Huixia Sun
Keyword(s):  
Pressure Sensor ◽  
High Performance ◽  
Large Scale ◽  
Low Cost ◽  
Pressure Sensors ◽  
Chemical Vapor ◽  
High Sensitivity ◽  
Wearable Electronics ◽  
Wide Range ◽  
Flexible Pressure Sensors

Researchers are showing an increasing interest in high-performance flexible pressure sensors owing to their potential uses in wearable electronics, bionic skin, and human–machine interactions, etc. However, the vast majority of these flexible pressure sensors require extensive nano-architectural design, which both complicates their manufacturing and is time-consuming. Thus, a low-cost technology which can be applied on a large scale is highly desirable for the manufacture of flexible pressure-sensitive materials that have a high sensitivity over a wide range of pressures. This work is based on the use of a three-dimensional elastic porous carbon nanotubes (CNTs) sponge as the conductive layer to fabricate a novel flexible piezoresistive sensor. The synthesis of a CNTs sponge was achieved by chemical vapor deposition, the basic underlying principle governing the sensing behavior of the CNTs sponge-based pressure sensor and was illustrated by employing in situ scanning electron microscopy. The CNTs sponge-based sensor has a quick response time of ~105 ms, a high sensitivity extending across a broad pressure range (less than 10 kPa for 809 kPa−1) and possesses an outstanding permanence over 4,000 cycles. Furthermore, a 16-pixel wireless sensor system was designed and a series of applications have been demonstrated. Its potential applications in the visualizing pressure distribution and an example of human–machine communication were also demonstrated.

scholarly journals GaAs Nanowires Grown by Catalyst Epitaxy for High Performance Photovoltaics

Crystals ◽  
2018 ◽  
Vol 8 (9) ◽  
pp. 347 ◽  
Author(s):  
Ying Wang ◽  
Xinyuan Zhou ◽  
Zaixing Yang ◽  
Fengyun Wang ◽  
Ning Han ◽  
...  
Keyword(s):  
Light Absorption ◽  
High Performance ◽  
Large Scale ◽  
Low Cost ◽  
Absorption Efficiency ◽  
Device Fabrication ◽  
Structure Property ◽  
Structure Property Relationships ◽  
Solar Energy Harvesting ◽  
Gaas Nanowire

Photovoltaics (PVs) based on nanostructured III/V semiconductors can potentially reduce the material usage and increase the light-to-electricity conversion efficiency, which are anticipated to make a significant impact on the next-generation solar cells. In particular, GaAs nanowire (NW) is one of the most promising III/V nanomaterials for PVs due to its ideal bandgap and excellent light absorption efficiency. In order to achieve large-scale practical PV applications, further controllability in the NW growth and device fabrication is still needed for the efficiency improvement. This article reviews the recent development in GaAs NW-based PVs with an emphasis on cost-effectively synthesis of GaAs NWs, device design and corresponding performance measurement. We first discuss the available manipulated growth methods of GaAs NWs, such as the catalytic vapor-liquid-solid (VLS) and vapor-solid-solid (VSS) epitaxial growth, followed by the catalyst-controlled engineering process, and typical crystal structure and orientation of resulted NWs. The structure-property relationships are also discussed for achieving the optimal PV performance. At the same time, important device issues are as well summarized, including the light absorption, tunnel junctions and contact configuration. Towards the end, we survey the reported performance data and make some remarks on the challenges for current nanostructured PVs. These results not only lay the ground to considerably achieve the higher efficiencies in GaAs NW-based PVs but also open up great opportunities for the future low-cost smart solar energy harvesting devices.

Modeling the Selective Laser Melting of Multi-Component Thermoelectric Powders

2018 ◽  
Author(s):  
Yongjia Wu ◽  
Lei Zuo ◽  
Kan Sun
Keyword(s):  
Selective Laser Melting ◽  
High Performance ◽  
Low Cost ◽  
Electrical Energy ◽  
Device Fabrication ◽  
Thermoelectric Device ◽  
Laser Melting ◽  
Thermoelectric Modules ◽  
Powder Bed ◽  
Unique Method

Thermoelectrics enables thermal and electrical energy conversion or device cooling without any moving parts. It has remained a significant challenge to manufacture compact and high performance thermoelectric modules in a large volume using the conventional methods because of their drawbacks in practice, such as the long processing time and misalignment of individual thermoelectric elements. Selective laser melting (SLM) based additive manufacturing approach might offer a unique method to fabricate the low cost, reliable, highly efficient, scalable, and environmentally friendly thermoelectric modules. To understand the thermodynamic and hydrodynamic phenomenon during the SLM processing is of critical importance to ensure high quality products. In this paper, we developed a model which can be used to guide the SLM manufacturing of thermoelectric material with other nanoparticles embedded for higher thermoelectric performance. This physical model based on the continuous equations had the ability to analyze the fluid flow driven by buoyancy force and surface tension, which can be used to analyze the influence of the process parameters on the pool size, particle segregation, as well as temperature distribution within the powder bed. This information is very useful for developing robust SLM for thermoelectric device fabrication.

Critical Process Issues in the Fabrication of a Lateral, Self-cleaning, MEMS Switch

2005 ◽  
Vol 872 ◽  
Author(s):  
Yong Shi ◽  
Sang-Gook Kim
Keyword(s):  
Contact Resistance ◽  
Low Cost ◽  
Chemical Vapor ◽  
Device Fabrication ◽  
Mems Switch ◽  
Lateral Contact ◽  
Mechanical Anchoring ◽  
Contact Surfaces ◽  
Self Cleaning ◽  
Physical And Chemical

AbstractA lateral contact MEMS switch was developed to address the needs for long life cycle, low contact resistance and low cost switches. The device is unique in its self-cleaning of particles, self-alignment of contact surfaces and the mechanical anchoring of the contact metal into the switch structures. The major issue for the lateral contact device fabrication is the creation of the vertical Au sidewall. Existing physical and chemical vapor deposition methods are found not satisfactory. The final Au sidewalls for electric contact are formed by electroplating in pre-patterned photoresist mold. SEM pictures show that the designed undulated contact surfaces are created successfully, and the surface of the electroplated Au is much smoother and denser than that by e-beam evaporation. The long lifecycle test shows that the contact resistance has been maintained below 0.1 Ω over 1010 cycles. The test results of the fabricated switch have proved the self-cleaning concept and opened the possibility of direct contact MEMS switch for high power and low cost RF applications.

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