High-Q integrated RF passives and RF-MEMS on silicon

2003 ◽  
Vol 783 ◽  
Author(s):  
Joost T.M. van Beek ◽  
Marc H.W.M. van Delden ◽  
Auke van Dijken ◽  
Patrick van Eerd ◽  
Andre B.M. Jansman ◽  
...  
Keyword(s):  
Rf Mems ◽  
Impedance Matching ◽  
Actuation Voltage ◽  
High Resistivity ◽  
Si Substrate ◽  
Low Loss ◽  
Passive Components ◽  
High Q ◽  
Si Substrates ◽  
Tuning Ratio

ABSTRACTA technology platform is described for the integration of low-loss inductors, capacitors, and MEMS capacitors on a high-resistivity Si substrate. Using this platform the board space area taken up by e.g. a DCS PA output impedance matching circuit can be reduced by 50%. The losses of passive components that are induced by the semi-conducting Si substrate can effectively be suppressed using a combination of surface amorphisation and the use of poly crystalline Si substrates. A MEM switchable capacitor with a capacitance switching factor of 40 and an actuation voltage of 5V is demonstrated. A continuous tuneable dual-gap capacitor is demonstrated with a tuning ratio of 9 using actuation voltages below 15V.

Design & Simulation of Low Loss 5-Bit Ku Band Switched Line MEMS Phase Shifter on Gaas

2011 ◽  
Vol 403-408 ◽  
pp. 5330-5334
Author(s):  
Anesh K. Sharma ◽  
Ashu K. Gautam ◽  
D.V.K. Sastry ◽  
S.G. Singh
Keyword(s):  
Phase Shift ◽  
Return Loss ◽  
Phase Shifter ◽  
Rf Mems ◽  
Structural Parameters ◽  
Actuation Voltage ◽  
Low Loss ◽  
Total Phase ◽  
Phase Shift Error ◽  
Ku Band

As the requirement for the low loss phase shifter increases, so does the development of RF MEMS as a solution. This paper presents the design & simulation of Switched line MEMS phase shifter for Ku band using GaAs substrate. The phase shift can be achieved by varying the lengths in delay path to the reference path for the same phase velocity. The electromagnetic & electromechanical simulations were carried out with various structural parameters to optimize the design. The novelties like low insertion loss, low actuation voltage with distributed actuation pads for DC and RF are used to make the design unique. The EM simulations are carried out using 3D simulator HFSS and a phase shift of 172.6 deg./dB for a total Phase shift of 348.75deg was achieved with return loss of 15.5dB over a frequency band from 16-18 GHz and a phase shift error less than ±2 degree in the 32 states. The electromechanical simulations are carried to achieve the low actuation voltage of 15.3V. These parameters make these suitable for the Phased array applications [1, 2].

scholarly journals Design and Simulation of Capacitive MEMS Switch for Ka Band Application

2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Vinay Bhatia ◽  
Sukhdeep Kaur ◽  
Kuldeep Sharma ◽  
Punam Rattan ◽  
Vishal Jagota ◽  
...  
Keyword(s):  
Frequency Band ◽  
Phase Shifter ◽  
Rf Mems ◽  
Dielectric Material ◽  
Actuation Voltage ◽  
3D Structure ◽  
Structure Design ◽  
High Resistivity ◽  
Ka Band ◽  
Mems Switch

In this paper, RF MEMS switch with capacitive contact is designed and analyzed for Ka band application. A fixed-fixed beam/meander configuration has been used to design the switch for frequency band 10 GHz to 40 GHz. Electromagnetic and electromechanical analysis of three-dimensional (3D) structure/design has been analyzed in multiple finite element method (FEM) based full-wave simulator (Coventorware and high-frequency structure simulator). A comparative study has also been carried out in this work. The high resistivity silicon substrate ( tan δ = 0.010 , ρ > 8   k Ω − cm , ε r = 11.8 ) with a thickness of 675 ± 25   μ m has been taken for switch realization. The designed structure shows an actuation voltage of around 9.2 V. Impedance matching for the switch structure is well below 20 dB, loss in upstate, i.e., insertion loss >0.5 dB, and isolation of >25 dB throughout the frequency band is observed for the aforesaid structure. Furthermore, to increase the RF parameters, AIN dielectric material has been used instead of SiO2 resulting in capacitance in downstate that increases hence improved the isolation. The proposed switch can be utilized in various potential applications such as any switching/tunable networks phased-array radar, reconfigurable antenna, RF phase shifter, mixer, biomedical, filter, and any transmitter/receiver (T/R) modules.

Low-Loss 4–6-GHz Tunable Filter With 3-Bit High-$Q$ Orthogonal Bias RF-MEMS Capacitance Network

2008 ◽  
Vol 56 (10) ◽  
pp. 2348-2355 ◽  
Author(s):  
S.-J. Park ◽  
M.A. El-Tanani ◽  
I. Reines ◽  
G.M. Rebeiz
Keyword(s):  
Rf Mems ◽  
Tunable Filter ◽  
Low Loss ◽  
High Q

Low-Loss 4-6 GHz Tunable Filter with 3-Bit High-Q Orthogonal RF-MEMS Capacitance Network

2008 ◽  
Author(s):  
Kamal Sarabandi ◽  
Sang-June Park ◽  
Mohammed A. El-Tanani ◽  
Isak Reines ◽  
Gabriel M. Rebeiz
Keyword(s):  
Rf Mems ◽  
Tunable Filter ◽  
Low Loss ◽  
High Q

scholarly journals BCB Based Packaging for Low Actuation Voltage RF MEMS Devices

2006 ◽  
Vol 969 ◽  
Author(s):  
David Peyrou ◽  
Fabienne PENNEC ◽  
Hikmat Achkar ◽  
Patrick PONS ◽  
Fabio Coccetti ◽  
...  
Keyword(s):  
Rf Mems ◽  
Actuation Voltage ◽  
Advanced Characterization ◽  
Microwave Range ◽  
Mems Devices ◽  
Low Loss ◽  
Mems Packaging ◽  
Physics Simulation ◽  
Original Approach

AbstractThis paper outlines the issues related to RF MEMS packaging and low actuation voltage. It is presented an original approach concerning the modeling of the capacitive contact using multi-physics simulation and advanced characterization. A similar approach is used concerning the packaging development where multi-physic simulations are used to optimize the process. A devoted package architecture is proposed featuring very low loss at microwave range.

RF MEMS capacitive switch on semi-suspended CPW using low-loss high-resistivity silicon substrate

2008 ◽  
Vol 85 (5-6) ◽  
pp. 1039-1042 ◽  
Author(s):  
M. Fernández-Bolaños ◽  
J. Perruisseau-Carrier ◽  
P. Dainesi ◽  
A.M. Ionescu
Keyword(s):  
Silicon Substrate ◽  
Rf Mems ◽  
High Resistivity ◽  
Low Loss ◽  
Capacitive Switch ◽  
High Resistivity Silicon

scholarly journals Surface Texturing of Si with Periodically Arrayed Oblique Nanopillars to Achieve Antireflection

Materials ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 380
Author(s):  
Jun-Hyun Kim ◽  
Sanghyun You ◽  
Chang-Koo Kim
Keyword(s):  
Aspect Ratio ◽  
Plasma Etching ◽  
Surface Texturing ◽  
Light Reflection ◽  
Si Substrate ◽  
Weighted Mean ◽  
Optical Reflectance ◽  
Si Substrates ◽  
Aspect Ratios ◽  
Shadowing Effect

Si surfaces were texturized with periodically arrayed oblique nanopillars using slanted plasma etching, and their optical reflectance was measured. The weighted mean reflectance (Rw) of the nanopillar-arrayed Si substrate decreased monotonically with increasing angles of the nanopillars. This may have resulted from the increase in the aspect ratio of the trenches between the nanopillars at oblique angles due to the shadowing effect. When the aspect ratios of the trenches between the nanopillars at 0° (vertical) and 40° (oblique) were equal, the Rw of the Si substrates arrayed with nanopillars at 40° was lower than that at 0°. This study suggests that surface texturing of Si with oblique nanopillars reduces light reflection compared to using a conventional array of vertical nanopillars.

scholarly journals Formation and Evaluation of Silicon Substrate with Highly-Doped Porous Si Layers Formed by Metal-Assisted Chemical Etching

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Yijie Li ◽  
Nguyen Van Toan ◽  
Zhuqing Wang ◽  
Khairul Fadzli Bin Samat ◽  
Takahito Ono
Keyword(s):  
Electrical Conductivity ◽  
Seebeck Coefficient ◽  
Contact Resistance ◽  
Power Factor ◽  
Chemical Etching ◽  
Porous Si ◽  
Si Substrate ◽  
Si Substrates ◽  
Output Performance ◽  
Metal Assisted Chemical Etching

AbstractPorous silicon (Si) is a low thermal conductivity material, which has high potential for thermoelectric devices. However, low output performance of porous Si hinders the development of thermoelectric performance due to low electrical conductivity. The large contact resistance from nonlinear contact between porous Si and metal is one reason for the reduction of electrical conductivity. In this paper, p- and n-type porous Si were formed on Si substrate by metal-assisted chemical etching. To decrease contact resistance, p- and n-type spin on dopants are employed to dope an impurity element into p- and n-type porous Si surface, respectively. Compared to the Si substrate with undoped porous samples, ohmic contact can be obtained, and the electrical conductivity of doped p- and n-type porous Si can be improved to 1160 and 1390 S/m, respectively. Compared with the Si substrate, the special contact resistances for the doped p- and n-type porous Si layer decreases to 1.35 and 1.16 mΩ/cm2, respectively, by increasing the carrier concentration. However, the increase of the carrier concentration induces the decline of the Seebeck coefficient for p- and n-type Si substrates with doped porous Si samples to 491 and 480 μV/K, respectively. Power factor is related to the Seebeck coefficient and electrical conductivity of thermoelectric material, which is one vital factor that evaluates its output performance. Therefore, even though the Seebeck coefficient values of Si substrates with doped porous Si samples decrease, the doped porous Si layer can improve the power factor compared to undoped samples due to the enhancement of electrical conductivity, which facilitates its development for thermoelectric application.

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