Material and Electrical Characterization of HfO2 Films for MIM Capacitors Application

2003 ◽  
Vol 766 ◽  
Author(s):  
Hang Hu ◽  
Chunxiang Zhu ◽  
Y. F. Lu ◽  
Y. H. Wu ◽  
T. Liew ◽  
...  
Keyword(s):  
High Performance ◽  
Analog Circuit ◽  
Electrical Characterization ◽  
Capacitance Density ◽  
Force Microscopy ◽  
Low Leakage ◽  
Atomic Force ◽  
Low Leakage Current ◽  
Metal Insulator Metal ◽  
Mim Capacitors

AbstractThin films of HfO2 high-κ dielectric have been prepared by pulsed-laser deposition (PLD) at various deposition conditions. X-ray diffraction (XRD), atomic force microscopy (AFM), and secondary ion mass spectroscopy (SIMS) were used to characterize the deposited films. Experimental results show that substrate temperature has little effect on the stoichiometry, while deposition pressure plays an important role in determining the ratio of Hf and O. The electrical properties of HfO2 Metal-Insulator-Metal (MIM) capacitors were investigated at various deposition temperatures. It is shown that the HfO2 (56 nm) MIM capacitor fabricated at 200 oC shows an overall high performance, such as a high capacitance density of ∼3.0 fF/νm2, a low leakage current of 2x10-9 A/cm2 at 3 V, etc. All these indicate that the HfO2 MIM capacitors are very suitable for use in Si analog circuit applications.

High-Performance MIM Capacitors based on TiO2/ZrO2/TiO2 and AlO-doped TiO2/ZrO2/TiO2 Dielectric Stacks for DRAM Applications

2013 ◽  
Vol 1561 ◽  
Author(s):  
Revathy Padmanabhan ◽  
Navakanta Bhat ◽  
S. Mohan ◽  
Y. Morozumi ◽  
Sanjeev Kaushal
Keyword(s):  
Leakage Current ◽  
High Performance ◽  
Constant Current ◽  
Barrier Heights ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Device Reliability ◽  
Metal Insulator Metal ◽  
Mim Capacitors

ABSTRACTMetal-insulator-metal (MIM) capacitors for DRAM applications have been realized using TiO2/ZrO2/TiO2 (TZT) and AlO-doped TZT (TZAZT and TZAZAZT) dielectric stacks. High capacitance densities of about 46.6 fF/μm2 (for TZT stacks), 46.2 fF/μm2 (for TZAZT stacks), and 46.8 fF/μm2 (for TZAZAZT stacks) have been achieved. Low leakage current densities of about 4.9×10−8 A/cm2, 5.5×10−9 A/cm2, and 9.7×10−9 A/cm2 (at -1 V) have been obtained for TZT, TZAZT, and TZAZAZT stacks, respectively. We analyze the leakage current mechanisms at different electric field regimes, and compute the barrier heights. The effects of constant current stress and constant voltage stress on the device characteristics are studied, and excellent device reliability is demonstrated. We compare the device performance of the fabricated capacitors with other stacked high-k MIM capacitors reported in recent literature.

Metal-insulator-metal capacitor with high capacitance density and low leakage current using ZrTiO4 film

2009 ◽  
Vol 95 (11) ◽  
pp. 113502 ◽  
Author(s):  
Yung-Hsien Wu ◽  
Bo-Yu Chen ◽  
Lun-Lun Chen ◽  
Jia-Rong Wu ◽  
Min-Lin Wu
Keyword(s):  
Leakage Current ◽  
Metal Insulator ◽  
Capacitance Density ◽  
High Capacitance ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Metal Insulator Metal

The Effect of Different Dielectric Materials in Designing High-Performance Metal-Insulator-Metal (MIM) Capacitors

2017 ◽  
Vol 7 (3) ◽  
pp. 1554
Author(s):  
M. A. Zulkifeli ◽  
S. N. Sabki ◽  
S. Taking ◽  
N. A. Azmi ◽  
S. S. Jamuar
Keyword(s):  
Breakdown Voltage ◽  
High Performance ◽  
Dielectric Materials ◽  
Dielectric Constants ◽  
Metal Insulator ◽  
Low Leakage ◽  
Dielectric Layers ◽  
Metal Insulator Metal ◽  
Materials Used ◽  
Mim Capacitors

<p>A Metal-Insulator-Metal (MIM) capacitor with high capacitance, high breakdown voltage, and low leakage current is aspired so that the device can be applied in many electronic applications. The most significant factors that affect the MIM capacitor’s performance is the design and the dielectric materials used. In this study, MIM capacitors are simulated using different dielectric materials and different number of dielectric layers from two layers up to seven layers.  The effect of the different dielectric constants (<em>k</em>) to the performance of the MIM capacitors is also studied, whereas this work investigates the effect of using low-<em>k</em> and high-<em>k</em> dielectric materials. The dielectric materials used in this study with high-<em>k</em> are Al<sub>2</sub>O<sub>3</sub> and HfO<sub>2</sub>, while the low-<em>k</em> dielectric materials are SiO<sub>2</sub> and Si<sub>3</sub>N<sub>4</sub>. The results demonstrate that the dielectric materials with high-<em>k</em> produce the highest capacitance. Results also show that metal-Al<sub>2</sub>O<sub>3</sub> interfaces increase the performance of the MIM capacitors. By increasing the number of dielectric layers to seven stacks, the capacitance and breakdown voltage reach its highest value at 0.39 nF and 240 V, respectively.</p>

MIM Capacitors Using ALD Al2O3 for RF IC and DRAM Applications

2004 ◽  
Vol 833 ◽  
Author(s):  
Sung Yong Ko ◽  
Jung Ik Oh ◽  
Joung Cheul Choi ◽  
Kang Hee Lee ◽  
Young Ho Bae ◽  
...  
Keyword(s):  
Leakage Current ◽  
Coplanar Waveguide ◽  
Atomic Layer ◽  
Good Reliability ◽  
Voltage Coefficient ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Layer Deposition ◽  
Metal Insulator Metal ◽  
Mim Capacitors

ABSTRACTMetal-insulator-metal (MIM) capacitors were fabricated in a coplanar waveguide type using the Al2O3 thin film. The Al2O3 film was grown by atomic layer deposition(ALD) using Methyl-Pyrolidine-Tri-Methyl-Aluminum (MPTMA) and H2O on Ti. The capacitance per unit area of the fabricated MIM capacitor was 0.229 μF/cm2. And it had lower voltage coefficient of capacitance (VCC) and lower leakage current than that of Al2O3 MIM capacitor prepared by Al oxidation and Si3N4 MIM capacitor prepared by PECVD respectively. The fabricated Al2O3 MIM capacitors prepared by ALD exhibited low VCC, low leakage current, small frequency-dependent capacitance reduction, low temperature coefficient of capacitance (TCC) and good reliability. The characteristics of the device were suitable for RF ICs and DRAM.

Mim Capacitors with HfO2 and HfAlOx for Si RF and Analog Applications

2003 ◽  
Vol 766 ◽  
Author(s):  
Xiongfei Yu ◽  
Chunxiang Zhu ◽  
Hang Hu ◽  
Albert Chin ◽  
M.F. Li ◽  
...  
Keyword(s):  
Leakage Current ◽  
Low Loss ◽  
Small Frequency ◽  
Capacitance Density ◽  
High Capacitance ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Al2o3 Concentration ◽  
Silicon Analog ◽  
Mim Capacitors

AbstractThe MIM capacitors with HfO2 and HfAlOx are investigated for Si RF and analog applications. The results show that both the capacitance density and voltage coefficients of capacitance (VCCs) increase with decreasing the HfO2 thickness. A high capacitance density of 13 fF/μm2with a low leakage current and a VCC of 607 ppm/V is obtained for 10 nm HfO2 MIM capacitor, which can meet the requirement of the ITRS roadmap by 2007 for silicon RF application. On the other hand, it was found that both the capacitance density and voltage coefficients of capacitance (VCC) values of the HfAlOx MIM capacitors decrease with increasing Al2O3 concentration. The results show that HfAlOx MIM capacitor with an Al2O3 mole fraction of 0.14 is optimized. It provides a high capacitance density of 3.5 fF/μm2 and a low VCC of μ140 ppm/V2. Also, small frequency dependence, low leakage current, and low loss tangent are obtained. Thus, the HfAlOx MIM capacitor with an Al2O3 mole ratio of 0.14 is very suitable for use in silicon analog applications.

Preparation of highly oriented Pb(Zr0.52Ti0.48)O3 thin films by sol-gel-hydrothermal process

1999 ◽  
Vol 14 (7) ◽  
pp. 2712-2715 ◽  
Author(s):  
Jianming Zeng ◽  
Chenglu Lin ◽  
Jinhua Li ◽  
Kun Li
Keyword(s):  
Thin Films ◽  
Sol Gel ◽  
Hydrothermal Process ◽  
Silicon Substrates ◽  
Rocking Curve ◽  
Force Microscopy ◽  
Low Leakage ◽  
Atomic Force ◽  
Low Leakage Current ◽  
Sol Gel Process

A novel sol-gel-hydrothermal process for preparation of highly oriented thin films of Pb(Zr0.52Ti0.48)O3 is reported. Pb(Zr0.52Ti0.48)O3 thin films with fully (111) orientation were successfully prepared on platinized silicon substrates at low temperature (100–200 °C) by combining a conventional sol-gel process and hydrothermal method, i.e., sol-gel-hydrothermal technique. The x-ray rocking curve for the (111) reflection as measured by a high-resolution four-crystal diffractrometer showed a narrow full width at half-maximum value of 0.20° for the as-prepared films. A dense, pinhole-free, and uniform surface morphology was observed from atomic force microscopy images of the films. The low leakage current density of the prepared films was also found.

The Electrical Characterization and Physical Failure Analysis for Transistor Gate Leakage

2006 ◽  
Author(s):  
Tsung-Te Li ◽  
Chao-Chi Wu ◽  
Jung-Hsiang Chuang ◽  
Jon C. Lee
Keyword(s):  
Failure Analysis ◽  
Electrical Characterization ◽  
Physical Analysis ◽  
Gate Leakage ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Voltage Stress ◽  
Leakage Site

Abstract This article describes the electrical and physical analysis of gate leakage in nanometer transistors using conducting atomic force microscopy (C-AFM), nano-probing, transmission electron microscopy (TEM), and chemical decoration on simulated overstressed devices. A failure analysis case study involving a soft single bit failure is detailed. Following the nano-probing analysis, TEM cross sectioning of this failing device was performed. A voltage bias was applied to exaggerate the gate leakage site. Following this deliberate voltage overstress, a solution of boiling 10%wt KOH was used to etch decorate the gate leakage site followed by SEM inspection. Different transistor leakage behaviors can be identified with nano-probing measurements and then compared with simulation data for increased confidence in the failure analysis result. Nano-probing can be used to apply voltage stress on a transistor or a leakage path to worsen the weak point and then observe the leakage site easier.

Fault Localization in Contact Level by Using Conductive Atomic Force Microscopy

2003 ◽  
Author(s):  
Jon C. Lee ◽  
J. H. Chuang
Keyword(s):  
Atomic Force Microscopy ◽  
Integrated Circuits ◽  
Fault Localization ◽  
Electrical Characterization ◽  
Conductive Atomic Force Microscopy ◽  
Force Microscopy ◽  
Atomic Force ◽  
Optical Electron ◽  
Defect Isolation ◽  
Voltage Contrast

Abstract As integrated circuits (IC) have become more complicated with device features shrinking into the deep sub-micron range, so the challenge of defect isolation has become more difficult. Many failure analysis (FA) techniques using optical/electron beam and scanning probe microscopy (SPM) have been developed to improve the capability of defect isolation. SPM provides topographic imaging coupled with a variety of material characterization information such as thermal, magnetic, electric, capacitance, resistance and current with nano-meter scale resolution. Conductive atomic force microscopy (C-AFM) has been widely used for electrical characterization of dielectric film and gate oxide integrity (GOI). In this work, C-AFM has been successfully employed to isolate defects in the contact level and to discriminate various contact types. The current mapping of C-AFM has the potential to identify micro-leaky contacts better than voltage contrast (VC) imaging in SEM. It also provides I/V information that is helpful to diagnose the failure mechanism by comparing I/V curves of different contact types. C-AFM is able to localize faulty contacts with pico-amp current range and to characterize failure with nano-meter scale lateral resolution. C-AFM should become an important technique for IC fault localization. FA examples of this technique will be discussed in the article.

Development of high k/III-V (InGaAs, InAs, InSb) structures for future low power, high speed device applications

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin
Keyword(s):  
Low Power ◽  
Leakage Current ◽  
High Speed ◽  
High Performance ◽  
Gate Oxide ◽  
Chemical Cleaning ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Cleaning Methods

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.

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