Designing Thermally Uniform Mems Hot Micro-Bolometers

2002 ◽  
Vol 729 ◽  
Author(s):  
Nicholas Moelders ◽  
Martin U. Pralle ◽  
Mark P. McNeal ◽  
Irina Puscasu ◽  
Lisa Last ◽  
...  
Keyword(s):  
High Reliability ◽  
Chemical Species ◽  
Infrared Camera ◽  
Optical Power ◽  
Optical Emission ◽  
Sensor Chip ◽  
Optical Noise ◽  
Chip Design ◽  
Reliable Performance ◽  
On Chip

AbstractHere we describe the evolution of a silicon, MEMS-based chip design developed for infrared gas and chemical detection. The “Sensor-Chip,” with integrated photonic crystal and reflective optics, employs narrow-band optical emission/absorption for selective identification of gas and chemical species. Gas concentration is derived from attenuated optical power, which results in a change in device set point. This change in temperature results in a change in device resistance, via the TCR of the Si. Thermal non-uniformity across the device results in optical “noise” and accelerates localized thermal and electrical failures. This paper reports the influence of processing and design, on achieving uniformly heated, high reliability devices. Specifically, we examine the role of contacts, drive scheme, and device thermal distribution on chip design. Experimentally the temperature uniformity was characterized using an infrared camera. Experimental results indicate that the design of the contact areas in combination with the device design is essential for the reliable performance of the Sensor-Chip. Redesigned devices were fabricated and demonstrated as highly-selective gas and chemical sensors.

Building a multi-FPGA-based emulation framework to support networks-on-chip design and verification

2010 ◽  
Vol 97 (10) ◽  
pp. 1241-1262 ◽  
Author(s):  
Yangfan Liu ◽  
Peng Liu ◽  
Yingtao Jiang ◽  
Mei Yang ◽  
Kejun Wu ◽  
...  
Keyword(s):  
Support Networks ◽  
Chip Design ◽  
Networks On Chip ◽  
On Chip

Integration of Al-Fill Processes for Contacts and VIAS

1996 ◽  
Vol 427 ◽  
Author(s):  
H. J. Barth
Keyword(s):  
High Pressure ◽  
Chip Design ◽  
Size And Shape ◽  
Future Developments ◽  
Pattern Density ◽  
New Challenges ◽  
On Chip ◽  
Damascene Interconnects ◽  
Low K ◽  
Electrical Data

AbstractToday different Al-fill techniques are used for the fill of submicron contacts and vias. The integration aspects of the most promising approaches, Al-reflow, cold/hot Al-planarization and high pressure Al-fill (Forcefill) are compared to the widely used W-plug technique. The filling properties are discussed with respect to future applications in ULSI devices. Special attention is given to the barrier stability in contacts and the influence on patterning. Various electrical data and reliability results are compared to metallizations with W-plugs. The implications of the Al-fill processes on chip design, especially on the size and shape of holes, the pattern density, the possibility of producing stacked contacts/vias and the metal to contact/via overlap are considered also. In an outlook for future developments, e.g. the introduction of low k dielectrics, the inverse metallization architecture with (dual) damascene interconnects and the emerging Cu metallizations, Alfill processes are facing new challenges which will be discussed.

scholarly journals DIA-TORUS:A Novel Topology for Network on Chip Design

2016 ◽  
Vol 8 (3) ◽  
pp. 137-148
Author(s):  
Deewakar Thakyal ◽  
Pushpita Chatterjee
Keyword(s):  
Network On Chip ◽  
Chip Design ◽  
On Chip

High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor

2019 ◽  
Vol 963 ◽  
pp. 832-836 ◽  
Author(s):  
Shuo Ben Hou ◽  
Per Erik Hellström ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Room Temperature ◽  
Uv Light ◽  
Optical Power ◽  
Current Gain ◽  
High Current ◽  
Promising Candidate ◽  
Forward Current ◽  
On Chip

This paper presents our in-house fabricated 4H-SiC n-p-n phototransistors. The wafer mapping of the phototransistor on two wafers shows a mean maximum forward current gain (βFmax) of 100 at 25 °C. The phototransistor with the highest βFmax of 113 has been characterized from room temperature to 500 °C. βFmax drops to 51 at 400 °C and remains the same at 500 °C. The photocurrent gain of the phototransistor is 3.9 at 25 °C and increases to 14 at 500 °C under the 365 nm UV light with the optical power of 0.31 mW. The processing of the phototransistor is same to our 4H-SiC-based bipolar integrated circuits, so it is a promising candidate for 4H-SiC opto-electronics on-chip integration.

High Level System-on-Chip Design using UML and SystemC

2007 ◽  
Author(s):  
Blanca Alicia Correa ◽  
Juan Fernando Eusse ◽  
Danny Munera ◽  
Jose Edinson Aedo ◽  
Juan Fernando Velez
Keyword(s):  
System On Chip ◽  
Level System ◽  
Chip Design ◽  
On Chip ◽  
High Level
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