Step Bunching during SiGe Growth on Vicinal Si(111) Surfaces

1999 ◽  
Vol 584 ◽  
Author(s):  
H. Hibino ◽  
T. Ogino
Keyword(s):  
Misorientation Angle ◽  
Growth Temperature ◽  
Diffusion Length ◽  
Vicinal Surface ◽  
Step Bunching ◽  
Terrace Width

AbstractWe investigate step bunching during SiGe growth on vicinal Si(111) surfaces. Step bunching occurs irrespective of the misorientation angle and direction of the vicinal surface, the growth temperature, and the Ge concentration. At 550°C, the average number of the steps in the bunch increases with the Ge concentration. After growth of 10-nm-thick SiGe layers, twodimensional islands are formed on the terraces, which indicates that the terrace width has already been saturated. Therefore, the terrace width is mainly determined by the diffusion length of the adatom. The average number of steps in the bunch increases with the Ge concentration because the diffusion length increases with the Ge concentration. The diffusion length also increases with the temperature. So the higher the temperature is, the larger the step bunch becomes.

Rem Study of Current Effect on the Structure of Clean Si(111) Surface

1990 ◽  
Vol 48 (1) ◽  
pp. 306-307
Author(s):  
A. Yamanaka ◽  
H. Ohse ◽  
K. Yagi
Keyword(s):  
The Other ◽  
Current Direction ◽  
Clean Surface ◽  
Current Effect ◽  
Atomic Steps ◽  
Step Bunching ◽  
Terrace Width ◽  
Step Down ◽  
A Current

Recently current effects on clean and metal adsorbate surfaces have attracted much attention not only because of interesting phenomena but also because of practically importance in treatingclean and metal adsorbate surfaces [1-6]. In the former case, metals deposited migrate on the deposit depending on the current direction and a patch of the deposit expands on the clean surface [1]. The migration is closely related to the adsorbate structures and substrate structures including their anisotropy [2,7]. In the latter case, configurations of surface atomic steps depends on the current direction. In the case of Si(001) surface equally spaced array of monatom high steps along the [110] direction produces the 2x1 and 1x2 terraces. However, a relative terrace width of the two domain depends on the current direction; a step-up current widen terraces on which dimers are parallel to the current, while a step-down current widen the other terraces [3]. On (111) surface, a step-down current produces step bunching at temperatures between 1250-1350°C, while a step-up current produces step bunching at temperatures between 1050-1250°C [5].In the present paper, our REM observations on a current induced step bunching, started independently, are described.Our results are summarized as follows.(1) Above around 1000°C a step-up current induces step bunching. The phenomenon reverses around 1200 C; a step-down current induces step bunching. The observations agree with the previous reports [5].

4H-SiC Homoepitaxial Growth on Vicinal-Off Angled Si-Face Substrate

2010 ◽  
Vol 645-648 ◽  
pp. 99-102 ◽  
Author(s):  
Kazutoshi Kojima ◽  
Sachiko Ito ◽  
Junji Senzaki ◽  
Hajime Okumura
Keyword(s):  
Surface Morphology ◽  
Epitaxial Growth ◽  
Growth Temperature ◽  
Growth Conditions ◽  
Step Bunching ◽  
Homoepitaxial Growth ◽  
Blocking Voltage ◽  
Basal Plane Dislocation ◽  
Epilayer Surface

We have carried out detailed investigations of 4H-SiC homoepitaxial growth on vicinal off-angled Si-face substrates. We found that the surface morphology of the substrate just after in-situ H2 etching was also affected by the value of the vicinal-off angle. Growth conditions consisting of a low C/Si ratio and a low growth temperature were effective in suppressing macro step bunching at the grown epilayer surface. We also demonstrated epitaxial growth without step bunching on a 2-inch 4H-SiC Si-face substrate with a vicinal off angle of 0.79o. Ni Schottky barrier diodes fabricated on an as-grown epilayer had a blocking voltage above 1000V and a leakage current of less than 5x10-7A/cm2. We also investigated the propagation of basal plane dislocation from the vicinal off angled substrate into the epitaxial layer.

Effect of Substrate Misonrentation on Ordering in Ga0.5In0.5P

1994 ◽  
Vol 340 ◽  
Author(s):  
L.C. Su ◽  
I.H. Ho ◽  
G.B. Stringfellow ◽  
Y. Leng ◽  
C.C. Williams
Keyword(s):  
Growth Rate ◽  
Misorientation Angle ◽  
Growth Temperature ◽  
Electrostatic Force ◽  
Surface States ◽  
Energy Difference ◽  
Growth Conditions ◽  
Disordered Materials ◽  
Transmission Electron ◽  
Degree Of Order

ABSTRACTOrdering produced in Ga0.5ln0.5P epitaxial layers grown by OMVPE can be controlled by variations in the substrate misorientation as well as the growth temperature and the growth rate. The ordering produced at a growth temperature of 620°C and a relatively low growth rate of 0.5 μm/hr is found to depend strongly on both the direction and angle of substrate misorientation. Transmission electron microscope images and transmission electron diffraction (TED) patterns as well as electrostatic force microscopy (EFM) and photoluminescence (PL) has been studied for misorientation angles of 0, 3, 6, and 9° from (001) toward the (111)B, (111)A, and [010] directions in the lattice. Misorientation in the (111)B direction (to produce [110] steps) increases ordering for angles of up to approximately 4°. Increasing the misorientation angle in the (111)A direction actually leads to a decrease in the degree of order observed. Misorientation in the [010] direction also decreases the degree of order, although the effect is much less than observed for misorientation in the (111)A direction. The most highly ordered material produced under these growth conditions is for a misorientation angle of 3° in the (111)A direction. Increasing the growth temperature to 720°C produces completely disordered material. This wide variation in ordering behavior has allowed the growth of an order/disorder heterostructure for a substrate misorientation of 3° in the (111)A direction. The heterostructure consists of a Ga0.52In0.48P layer grown at 740°C followed by an ordered layer grown at 620°C. The x-ray diffraction results show that both layers are precisely lattice-matched to the GaAs substrate. TED patterns show that the first layer is completely disordered and the top layer is highly ordered, with only a single variant. EFM images of the order/disorder heterostructure show a pronounced contrast at the interface, attributed to the large difference in the nature of the surface states in the ordered and disordered materials. The 10 K PL spectrum consists of two sharp and distinct peaks at 1.995 and 1.830 eV from the disordered and ordered materials, respectively. The peak separation represents the largest energy difference between ordered and disordered materials reported to date. Such heterostructures may be useful for photonic devices.

Comparative Characteristics of GaAs and InAs Langmuir Evaporation - Monte Carlo Simulation

2018 ◽  
Vol 386 ◽  
pp. 27-32 ◽  
Author(s):  
Anna A. Spirina ◽  
Igor Neizvestny ◽  
Nataliya L. Shwartz
Keyword(s):  
Monte Carlo Simulation ◽  
Monte Carlo ◽  
High Temperature ◽  
Surface Morphology ◽  
Indium Arsenide ◽  
Transformation Kinetic ◽  
High Temperature Annealing ◽  
Vicinal Surface ◽  
Evaporation Temperature ◽  
Terrace Width

The process of GaAs and InAs substrates high-temperature annealing under the Langmuir evaporation conditions is studied by Monte Carlo simulation. The temperature range of gallium arsenide and indium arsenide congruent and incongruent evaporation are determined. It was demonstrated that the congruent evaporation temperature Tc is sensitive to the vicinal surface terrace width. The decrease of the terrace width results in a decrease in the congruent evaporation temperature. The Ga and In diffusion lengths along the (111)A and (111)B surfaces at congruent temperatures are estimated. The surface morphology transformation kinetic during high-temperature annealing is analyzed.

Thermal step bunching and interstep attraction on the vicinal surface with adsorption

2003 ◽  
Vol 67 (12) ◽  
Author(s):  
Noriko Akutsu ◽  
Yasuhiro Akutsu ◽  
Takao Yamamoto
Keyword(s):  
Vicinal Surface ◽  
Step Bunching

SiC Migration Enhanced Embedded Epitaxial (ME3) Growth Technology

2006 ◽  
Vol 527-529 ◽  
pp. 251-254 ◽  
Author(s):  
Yuuichi Takeuchi ◽  
Mitsuhiro Kataoka ◽  
Tsunenobu Kimoto ◽  
Hiroyuki Matsunami ◽  
Rajesh Kumar Malhan
Keyword(s):  
High Temperature ◽  
Epitaxial Growth ◽  
Growth Temperature ◽  
Crystal Orientation ◽  
Growth Process ◽  
Diffusion Length ◽  
Growth Behavior ◽  
Electrical Performance ◽  
Similar Growth ◽  
Growth Technology

In this work, we have developed an innovative epitaxial growth process named the “Migration Enhanced Embedded Epitaxial” (ME3) growth process. It was found that at elevated growth temperatures, the epitaxial growth at the bottom of the trenches is greatly enhanced compared to growth on the sidewalls. This is attributed to the large surface diffusion length of reactant species mainly due to the higher growth temperature. In addition, it was found that this high temperature ME3 growth process is not influenced by the crystal-orientation. Similar growth behavior was observed for stripe-trench structures aligned either along the [11-20] or [1-100] directions. No difference was observed in the electrical performance of the pn diodes fabricated on either oriented stripe geometry. The ME3 process can also be used as an alternative to ion-implantation technology for selective doping process.

MODELING OF THIN FILM GROWTH ON A TILTED MISCUT SUBSTRATE: STATISTICAL PROPERTIES AND THE OPTIMUM GROWTH CONDITIONS

2012 ◽  
Vol 26 (15) ◽  
pp. 1250087 ◽  
Author(s):  
PATCHA CHATRAPHORN ◽  
CHANAKAN CHOMNGAM
Keyword(s):  
Thin Film ◽  
Diffusion Length ◽  
Film Growth ◽  
Growth Conditions ◽  
Thin Film Growth ◽  
Vicinal Surface ◽  
Optimum Conditions ◽  
Step Flow ◽  
Step Flow Growth ◽  
Miscut Substrate

Most studies of thin film growth simulations are performed on flat substrates. However, in reality, a substrate is usually miscut leading to a vicinal surface with a small tilt. The goal of this work is to study effects of an initial configuration of a miscut substrate on the grown film. The Das Sarma–Tamborenea model with modified diffusion rules is used for the simulations. The modification is done to allow variation in the surface diffusion length and mobility of adatoms. The results show that the optimum conditions that lead to step-flow growth are long diffusion length and small step height.

Step bunching to step-meandering transition induced by electromigration on Si(111) vicinal surface

2009 ◽  
Vol 603 (3) ◽  
pp. 507-512 ◽  
Author(s):  
F. Leroy ◽  
D. Karashanova ◽  
M. Dufay ◽  
J.-M. Debierre ◽  
T. Frisch ◽  
...  
Keyword(s):  
Vicinal Surface ◽  
Step Bunching

Cu induced step bunching on a Si(111) vicinal surface studied by reflection electron microscopy

1999 ◽  
Vol 433-435 ◽  
pp. 512-516 ◽  
Author(s):  
Y. Takahashi ◽  
H. Minoda ◽  
Y. Tanishiro ◽  
K. Yagi
Keyword(s):  
Electron Microscopy ◽  
Vicinal Surface ◽  
Step Bunching ◽  
Reflection Electron Microscopy

Sublimation Growth of 6H-SiC Boule on Various a-Plane Substrates

2000 ◽  
Vol 640 ◽  
Author(s):  
S. Nishino ◽  
T. Nishiguchi ◽  
Y. Masuda ◽  
M. Sasaki ◽  
S. Ohshima
Keyword(s):  
Growth Temperature ◽  
Layer Growth ◽  
Growth Mode ◽  
Layer By Layer ◽  
Step Bunching ◽  
Step Flow ◽  
Cvd Growth ◽  
The Difference ◽  
Step Flow Growth ◽  
Sublimation Growth

ABSTRACTSublimation growth of 6H-SiC was performed on {1100} and {1120} substrates. The difference between the growth on {1100} plane and {1120} plane was observed. {1100} facet was almost flat and there were grooves oriented toward <1120> direction. The step bunching was observed on {1100} plane 5° off-axis. A lot of pits were introduced on {1120} plane of the crystal grown both on {1100} and {1120} substrates. Step flow growth toward <1120> direction created the pits on {1120} plane. It was important to grow crystal by layer by layer growth on {1120} plane. By changing the growth mode from step flow growth to layer by layer growth, pit on the {1120} plane may be reduced as same as CVD growth on {1120} plane. Growth temperature and C/Si ratio should be optimized to keep layer by layer growth.

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