Plasmons on Luminescent Porous Silicon Prepared with Ethanol and Critical Point Drying

1998 ◽  
Vol 536 ◽  
Author(s):  
O. Resto ◽  
L. F. Fonseca ◽  
S. Z. Weisz ◽  
A. Many ◽  
Y. Goldstein

AbstractWe investigated the plasmon characteristics on luminescent porous silicon using electron energy loss spectroscopy. The samples were prepared from p-type crystalline silicon, (100) face, using the conventional electrochemical etching technique with the usual solution of HF, ethanol and water, followed by a critical point drying process. The energy of the bulk plasmon was measured both before and after sputter cleaning the sample with argon-ion bombardment. We found that initially the plasmon energy was slightly higher, ∼18 eV, than the plasmon energy of crystalline silicon. After sputter cleaning the sample with 5 keV Ar+ ions, the plasmon energy increased to ∼20 eV. Exposure to the electron beam used for the measurements caused a slow upward shift of the plasmon energy as a function of time, toward a saturation energy of 22-23 eV, an energy close to the plasmon energy of SiC. Auger spectroscopy performed in parallel showed an increasing carbon coverage. We prepared also samples without ethanol in the etching solution and/or with no critical point drying. Samples that did not undergo the critical point drying process showed consistently a practically constant plasmon energy, with almost no change upon sputtering and/or exposure to the electron beam. On the other hand, samples that were prepared with or without ethanol but using the critical point drying process, showed an appreciable increase in the plasmon energy upon exposure to the electron beam.We conclude that traces of CO2, used in the critical point drying process, are stored in the pores of the porous silicon surface and serve as a source of carbon. Apparently, upon activation by argon bombardment or by the electron beam, the carbon interacts with the porous Si surface forming a carbon-silicon compound, most probably SiC.

Nanomaterials ◽  
2021 ◽  
Vol 11 (3) ◽  
pp. 783
Author(s):  
Jeeyoon Jeong ◽  
Hyosim Yang ◽  
Seondo Park ◽  
Yun Daniel Park ◽  
Dai-Sik Kim

A metallic nano-trench is a unique optical structure capable of ultrasensitive detection of molecules, active modulation as well as potential electrochemical applications. Recently, wet-etching the dielectrics of metal–insulator–metal structures has emerged as a reliable method of creating optically active metallic nano-trenches with a gap width of 10 nm or less, opening a new venue for studying the dynamics of nanoconfined molecules. Yet, the high surface tension of water in the process of drying leaves the nano-trenches vulnerable to collapsing, limiting the achievable width to no less than 5 nm. In this work, we overcome the technical limit and realize metallic nano-trenches with widths as small as 1.5 nm. The critical point drying technique significantly alleviates the stress applied to the gap in the drying process, keeping the ultra-narrow gap from collapsing. Terahertz spectroscopy of the trenches clearly reveals the signature of successful wet etching of the dielectrics without apparent damage to the gap. We expect that our work will enable various optical and electrochemical studies at a few-molecules-thick level.


1995 ◽  
Vol 380 ◽  
Author(s):  
S. P. Duttagupta ◽  
C. Peng ◽  
L. Tsybeskov ◽  
P. M. Fauchet

ABSTRACTWe have investigated several methods to form submicron-size porous silicon regions. Porous silicon can emit light from the violet to past 1.5 μm with high photoluminescence efficiency at room temperature. It is composed of a high density of nanometer-scale crystalline silicon wires or dots. To integrate light-emitting porous silicon (LEPSi) LEDs with conventional Si microelectronics, it is necessary to produce miniature LEPSi regions adjacent to fully protected crystalline silicon regions. These techniques can be divided into two groups. In the first group formation of LEPSi is prevented during electrochemistry. Using optical and electron beam lithography, and a trilayer process with silicon nitride or amorphization by ion-implantation, we have made LEPSi patterns as small as 100 nm. In the second group, the formation of LEPSi during electrochemistry is enhanced by ion-milling or reactive ion-etching which we have found to help the pore nucleation. We have used a variety of mapping techniques, such as photoluminescence, atomic force and electron beam microscopies, to characterize the sharpness of the interface between the porous silicon and crystalline silicon regions.


2017 ◽  
Vol 46 ◽  
pp. 45-56 ◽  
Author(s):  
Khalid Omar ◽  
Khaldun A. Salman

Electrochemical etching was carried out to produce porous silicon based on crystalline silicon n-type (100) and (111) wafers. Etching times of 10, 20, and 30 min were applied. Porous silicon layer was used as anti-reflection coating on crystalline silicon solar cells. The optimal etching time is 20 min for preparing porous silicon layers based on crystalline silicon n-type (100) and (111) wafers. Nanopores with high porosity were produced on the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers with average diameters of 5.7 and 5.8 nm, respectively. Average crystallite sizes for the porous silicon layer based on crystalline silicon n-type (100) and (111) wafers were 20.57 and 17.45 nm at 20 and 30 min, respectively, due to the increase in broadening of the full width at half maximum. Photoluminescence peaks for porous silicon layers based on crystalline silicon n-type (100) and (111) wafers increased with growing porosity and a great blue shift in luminescence. The minimum effective coefficient of reflection was obtained from porous silicon layers based on the crystalline silicon n-type (100) wafer compared with n-type (111) wafer and as-grown at different etching times. Porous silicon layers based on the crystalline silicon n-type (100) wafer at 20 min etching time exhibited excellent light trapping at wavelengths ranging from 400 to 1000 nm. Thus, fabricated crystalline silicon solar cells based on porous silicon (100) anti-reflection coating layers achieved the highest efficiency at 15.50% compared to porous silicon (111) anti-reflection coating layers. The efficiency is characterized applying I-V characterization system under 100 mW/cm2 illumination conditions.


2020 ◽  
Vol 10 (02) ◽  
pp. 265-272
Author(s):  
Nihad K. Ali ◽  
Sazan M. Haidary ◽  
Kosar A. Omer ◽  
Fadzilah A. Abdul Majid ◽  
Emma P. Córcoles ◽  
...  

Porous silicon (pSi) microparticles with pore diameter 15 to 20 nm were fabricated by electrochemical etching of single-crystalline silicon (Si) wafers (n-type) to be used as delivery systems for the anticancer drug mitomycin C (MMC). The in vitro toxicity of the mitomycin-loaded pSi carrier was investigated on human prostate carcinoma (DU145) cells. The cells showed a decrease in viability of ~80% over a 6 hours period, when using mitomycin. Meanwhile, a ~55% decrease in cell viability was observed, when using the pSi carrier to deliver the drug. The drug-loaded carrier showed a sustained release throughout 24 hours, with an 80% decrease in cell viability after 16 hours. This observed controlled release of mitomycin from the pSi carrier suggests a superior therapeutic effect than the direct administration of mitomycin, as it potentially minimizes the drug side effects. Results showed that the strong cytotoxic effect towards the prostate cancer cells was due to the drug and not the carrier since the mitomycin-loaded pSi carrier affected cell viability, but the pSi carrier showed no toxicity. Furthermore, it was observed that with a higher amount of drug-loaded carriers, the toxicity effect was higher, thus, allowing further control of the therapeutic effect of the carrier.


2021 ◽  
Vol 19 (50) ◽  
pp. 77-83
Author(s):  
Ghasaq Ali Tomaa ◽  
Alaa Jabbar Ghazai

Using photo electrochemical etching technique (PEC), porous silicon (PS) layers were produced on n-type silicon (Si) wafers to generate porous silicon for n-type with an orientation of (111) The results of etching time were investigated at: (5,10,15 min). X-ray diffraction experiments revealed differences between the surface of the sample sheet and the synthesized porous silicon. The largest crystal size is (30 nm) and the lowest crystal size is (28.6 nm) The analysis of Atomic Force Microscopy (AFM) and Field Emission Scanning Electron Microscope (FESEM) were used to research the morphology of porous silicon layer. As etching time increased, AFM findings showed that root mean square (RMS) of roughness and porous silicon grain size decreased and FESEM showed a homogeneous pattern and verified the formation of uniform porous silicon.


1999 ◽  
Vol 14 (11) ◽  
pp. 4167-4175 ◽  
Author(s):  
S. Zangooie ◽  
R. Jansson ◽  
H. Arwin

Porosity depth profiles in porous silicon were realized by time modulation of the applied current density during electrochemical etching of crystalline silicon. The samples were investigated by variable angle spectroscopic ellipsometry. Using a basic optical model based on isotropy assumptions and the Bruggeman effective medium approximation, deviations from an ideal profile in terms of an interface roughness between the silicon substrate and the porous silicon layer and a compositional gradient normal to the surface were revealed. Furthermore, optical anisotropy of the sample was investigated by generalized ellipsometry. The anisotropy was found to be uniaxial with the optic axis tilted from surface normal by about 25°. The material was also found to exhibit positive birefringence.


2020 ◽  
Vol 398 ◽  
pp. 29-33 ◽  
Author(s):  
Mariam M. Hassan ◽  
Makram A. Fakhri ◽  
Salah Aldeen Adnan

Porous silicon (n-PS) with diverse morphologies was prepared on silicon (Si) substrate via photo-electrochemical etching technique. We studies the structure, surface morphology, pore diameter, roughness, based on (XRD), (AFM), (SEM) at different etching time (5, 10 min) and current (10mA/cm2).


2009 ◽  
Vol 2009 ◽  
pp. 1-7 ◽  
Author(s):  
Pushpendra Kumar ◽  
Peter Lemmens ◽  
Manash Ghosh ◽  
Frank Ludwig ◽  
Meinhard Schilling

The most common fabrication technique of porous silicon (PS) is electrochemical etching of a crystalline silicon wafer in a hydrofluoric (HF) acid-based solution. The electrochemical process allows for precise control of the properties of PS such as thickness of the porous layer, porosity, and average pore diameter. The effect of HF concentration in the used electrolyte on physical and electronic properties of PS was studied by visual color observation, measuring nitrogen sorption isotherm, field emission type scanning electron microscopy, Raman spectroscopy, and photoluminescence spectroscopy. It was found that with decrease in HF concentration, the pore diameter increased. The PS sample with large pore diameter, that is, smaller nanocrystalline size of Si between the pores, was found to lead to a pronounced photoluminescence peak. The systematic rise of photoluminescence peak with increase of pore diameter and porosity of PS was attributed to quantum confinement. The changes in nanocrystalline porous silicon were also clearly observed by an asymmetric broadening and shift of the optical silicon phonons in Raman spectra. The change in electronic properties of PS with pore diameter suggests possibilities of use of PS material as a template for fundamental physics as well as an optical material for technological applications.


2019 ◽  
Vol 54 (5) ◽  
Author(s):  
Warood Kream Alaarage ◽  
Luma Hafedh Abed Oneiza ◽  
Mohanad Ghulam Murad Alzubaidi

In our work, a P-type porous silicon (PSi) with orientation (100) have been prepared using the chemical etching method; the goal is to study the electrical properties of PSi samples prepared with completely different etching current (7, 9, 11 and 13) mA and glued for (15 min) anodization time. Depending on the atomic force microscopy (AFM) investigation, we notice the roughness of Si surface increases with increasing etching current because of increases within the dimension (diameter) of surface pits. The electrical and optoelectronic properties of prepared PSi, specifically capacitance-voltage (C-V), current-voltage (I-V), responsivity and detectivity, are analyzed. It had been found that electrical characteristics of porous Si samples measured in dark (Id) and below illumination (IPh) will be fitted well by the equations of thermal emission. From this point of view, Schottky barrier height (ɸB) and ideality factor (n) of made-up photodetectors were calculated. We tended to determine from I-V characteristics of a dark, and illuminations that the pass current through the PSi layer reduced by increasing the etching current, as a result of increasing the electrical resistance of PSi layer and therefore the optimum value of ideality factor is (2.7), whereas from C-V characteristic we determined that in-built potential accumulated with increasing etching current. The results show that there are clear results for better performance of photodetectors.


2018 ◽  
Vol 16 (37) ◽  
pp. 98-107 ◽  
Author(s):  
Iftikhar M. Ali

In this work, porous silicon (PS) are fabricated using electrochemical etching (ECE) process for p-type crystalline silicon (c-Si) wafers of (100) orientation. The structural, morphological and electrical properties of PS synthesized at etching current density of (10, 20, 30) mA/cm2 at constant etching time 10 min are studied. From X-ray diffraction (XRD) measurement, the value of FWHM is in general decreases with increasing current density for p-type porous silicon (p-PS). Atomic force microscope (AFM) showed that for p-PS the average pore diameter decreases at 20 mA. Porous silicon which formed on silicon will be a junction so I-V characteristics have been studied in the dark to calculate ideality factor (n), and saturation current (Is) for these junctions. These junctions are used in photo sensors applications, where the photo sensors have been examined at blue light region. Sensitivity, rise and fall times have been calculated for this wavelength, the maximum value for sensitivity is (3797.6 %) at etching current density 10 mA/cm2 under blue light illumination at zero bias voltage.


Sign in / Sign up

Export Citation Format

Share Document