Electronically Enhanced Reaction of Process-Induced Defects in GaAs

1998 ◽  
Vol 510 ◽  
Author(s):  
K. Wada ◽  
H. Nakanishi ◽  
K. Yamada ◽  
L.C. Kimerling
Keyword(s):  
Ion Implantation ◽  
Plasma Etching ◽  
Reverse Bias ◽  
Electronic Excitation ◽  
Forward Bias ◽  
Structural Instability ◽  
Active Centers ◽  
Device Processing ◽  
Induced Defects ◽  
Defect Reaction

AbstractThe present paper reviews current understanding on enhanced reactions of process-induced defects in GaAs under electronic excitation. Device processing to be employed for point defect generation is Be ion implantation and Ar plasma etching. It is shown that reduction of electronic active centers is clearly enhanced by annealing under forward bias application and by annealing under reverse bias application at temperature as low as 200°C. The enhancement mechanisms are discussed in terms of recombination-enhanced defect reaction and structural instability induced by charge state effect.

Scanned Electron Beam Annealing of Boron-Implanted Diodes

1980 ◽  
Vol 1 ◽  
Author(s):  
T. O. Yep ◽  
R. T. Fulks ◽  
R. A. Powell
Keyword(s):  
Electron Beam ◽  
Ion Implantation ◽  
Reverse Bias ◽  
Carrier Lifetime ◽  
Reverse Current ◽  
Electrical Activation ◽  
Electrical Characteristics ◽  
Low Resolution ◽  
Implantation Damage ◽  
Dopant Redistribution

ABSTRACTSuccessful annealing of p+ n arrays fabricated by ion-implantation of 11B (50 keV, 1 × 1014 cm-2) into Si (100 has been performed using a broadly rastered, low-resolution (0.25-inch diameter) electron beam. A complete 2" wafer could be uniformly annealed in ≃20 sec with high electrical activation (>75%) and small dopant redistribution (≃450 Å). Annealing resulted In p+n junctions characterized by low reverse current (≃4 nAcm-2 at 5V reverse bias) and higher carrier lifetime (80 μsec) over the entire 2" wafer. Based on the electrical characteristics of the diodes, we estimate that the electron beam anneal was able to remove ion implantation damage and leave an ordered substrate to a depth of 5.5 m below the layer junction.

Comparison of Current and Light Induced Defects in a-Si:H

1993 ◽  
Vol 297 ◽  
Author(s):  
R.A. Street ◽  
W.B. Jackson ◽  
M. Hack
Keyword(s):  
Numerical Modelling ◽  
Reverse Bias ◽  
Defect Density ◽  
Reverse Current ◽  
Bias Current ◽  
Spatial Profile ◽  
Forward Current ◽  
Defect Creation ◽  
Induced Defects ◽  
Metastable Defect

Metastable defect creation by illumination and by a forward current in p-i-n devices are compared using CPM and reverse current measurements of the defect density. The data show that the same defects are formed by the two mechanisms, but with different spatial profiles. Numerical modelling shows how the spatial profile influences the reverse bias current.

Correlation Between Defect Characteristics and Layer Intermixing in Si Implanted GaAs/AIGaAs Superlattices

1989 ◽  
Vol 147 ◽  
Author(s):  
Samuel Chen ◽  
S.-Tong Lee ◽  
G. Braunstein ◽  
G. Rajeswaran ◽  
P. Fellinger
Keyword(s):  
Ion Implantation ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Peak Position ◽  
Compound Semiconductor ◽  
Subsequent Annealing ◽  
Semiconductor Superlattices ◽  
Furnace Annealing ◽  
Annealing Conditions ◽  
Induced Defects

AbstractDefects induced by ion implantation and subsequent annealing are found to either promote or suppress layer intermixing in Ill-V compound semiconductor superlattices (SLs). We have studied this intriguing relationship by examining how implantation and annealing conditions affect defect creation and their relevance to intermixing. Layer intermixing has been induced in SLs implanted with 220 keV Si+ at doses < 1 × 1014 ions/cm2 and annealed at 850°C for 3 hrs or 1050°C for 10 s. Upon furnace annealing, significant Si in-diffusion is observed over the entire intermixed region, but with rapid thermal annealing layer intermixing is accompanied by negligible Si movement. TEM showed that the totally intermixed layers are centered around a buried band of secondary defects and below the Si peak position. In the nearsurface region layer intermixing is suppressed and is only partially completed at ≤1 × 1015 Si/cm2. This inhibition is correlated to a loss of the mobile implantation-induced defects, which are responsible for intermixing.

scholarly journals Etch Processing of III-V Nitrides

1999 ◽  
Vol 4 (S1) ◽  
pp. 902-913 ◽  
Author(s):  
Charles R. Eddy
Keyword(s):  
Plasma Etching ◽  
Microwave Power ◽  
Ohmic Contacts ◽  
High Density ◽  
Etching Process ◽  
Ion Energy ◽  
Plasma Etching Process ◽  
Device Processing ◽  
The Impact ◽  
Density Plasma

As III-V nitride devices advance in technological importance, a fundamental understanding of device processing techniques becomes essential. Recent works have exposed various aspects of etch processes. The most recent advances and the greatest remaining challenges in the etching of GaN, AlN, and InN are reviewed. A more detailed presentation is given with respect to GaN high density plasma etching. In particular, the results of parametric and fundamental studies of GaN etching in a high density plasma are described. The effect of ion energy and mass on surface electronic properties is reported. Experimental results identify preferential sputtering as the leading cause of observed surface non-stoichiometry. This mechanism provides excellent surfaces for ohmic contacts to n-type GaN, but presents a major obstacle for Schottky contacts or ohmic contacts to p-type GaN. Chlorine-based discharges minimize this stoichiometry problem by improving the rate of gallium removal from the surface. In an effort to better understand the high density plasma etching process for GaN, in-situ mass spectrometry is employed to study the chlorine-based high density plasma etching process. Gallium chloride mass peaks were monitored in a highly surface sensitive geometry as a function of microwave power (ion flux), total pressure (neutral flux), and ion energy. Microwave power and pressure dependencies clearly demonstrate the importance of reactive ions in the etching of wide band gap materials. The ion energy dependence demonstrates the importance of adequate ion energy to promote a reasonable etch rate (≥100-150 eV). The benefits of ion-assisted chemical etching are diminished for ion energies in excess of 350 V, placing an upper limit to the useful ion energy range for etching GaN. The impact of these results on device processing will be discussed and future needs identified.

Shallow P+-N Junction Fabrication by Plasma Immersion Ion Implantation

1991 ◽  
Vol 223 ◽  
Author(s):  
C. A. Pico ◽  
X. Y. Qian ◽  
E. Jones ◽  
M. A. Lieberman ◽  
N. W. Cheung
Keyword(s):  
Ion Implantation ◽  
Ideality Factor ◽  
High Frequency ◽  
Cyclotron Resonance ◽  
High Field ◽  
Electron Cyclotron Resonance ◽  
Forward Bias ◽  
Electron Cyclotron ◽  
Significant Damage ◽  
Plasma Immersion Ion Implantation

ABSTRACTPlasma immersion ion implantation (PIII) has been applied to fabricate shallow p-n junction diodes and MOS test structures. BF3 ions created by an electron cyclotron resonance source were implanted into n-type Si(100) at an accelerating voltage of −2 kv. The implant doses ranged from 4 × 1014/cm2 to 4 × 1015/cm2. In some cases, the top layers of the Si(100) substrates were preamorphized by a 3 × 1015/cm2 to 1016/cm2 implant of SiF4 by PIII at −7.2 kV prior to the BF3 implant. The ideality factor exhibited in both non- and preamorphized samples during forward bias is 1.02 to 1.05. Reverse leakages were measured at 30 nA/cm2 at −5V. High frequency capacitance and high field breakdown measurements of the oxide test structures showed no significant damage to the oxide.

Sign in / Sign up

Export Citation Format

Share Document