Properties of Single-Crystal Silicon Films on Amorphous SiO2 on Single-Crystal Cubic Zirconia Substrates

1985 ◽  
Vol 48 ◽  
Author(s):  
I. Golecki ◽  
R. L. Maddox ◽  
H. L. Glass ◽  
A. L. Lin ◽  
H. M. Manasevit
Keyword(s):  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon On Insulator ◽  
Back Side ◽  
X Ray Diffraction ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Sio2 ◽  
Cubic Zirconia ◽  
Si Films

ABSTRACTA new approach to achieving a large-area silicon-on-insulator technology without pre-patterning is described. (100) Si films are first grown epitaxially on (100) yttria-stabilized cubic zirconia (YSZ) substrates by the pyrolysis of SiH4. The Si side of the <Si>/<YSZ>interface is then oxidized in pyrogenic steam (at 925 °C) or dry oxygen (at 1100°C) to form the structure <Si>/amorphous SiO2/<YSZ>. The oxidation occurs by the rapid diffusion of oxidants through the 0.42 mm thick YSZ substrate; e.g., a 0.3 μm SiO2 layer is obtained in 6 h in steam. The samples are analyzed by Rutherford backscattering and channeling spectrometry, X-ray diffraction, infra-red reflectance, Auger electron spectroscopy and sheet resistance measurements. In addition to forming the preferred Si/SiO2 interface, the back-side oxidation eliminates the most defective part of the Si film.

Improving Silicon Crystallinity by Grain Reorientation Annealing

2009 ◽  
Vol 1153 ◽  
Author(s):  
Katherine L. Saenger ◽  
Joel P. de Souza ◽  
Daniel Inns ◽  
Keith E. Fogel ◽  
Devendra K. Sadana
Keyword(s):  
Single Crystal ◽  
High Efficiency ◽  
Low Cost ◽  
Single Crystal Silicon ◽  
Chemical Vapor ◽  
High Growth ◽  
Silicon On Insulator ◽  
Crystal Silicon ◽  
Crystal Material ◽  
Si Films

AbstractDemand for high efficiency, low-cost solar cells has led to strong interest in post-deposition processing techniques that can improve the crystallinity of thick (1 to 40 μm) silicon films deposited at high growth rates. Here we describe a high temperature grain reorientation annealing process that enables the conversion of polycrystalline silicon (poly-Si) into a single crystal material having the orientation of an underlying single crystal Si seed layer. Poly-Si films of thickness 0.5 to 1.0 μm were deposited by low pressure chemical vapor deposition (LPCVD) on substrates comprising a surface thermal oxide or a 100-oriented single crystal silicon-on-insulator (SOI) layer. After annealing at 1300 °C for 1 hour, poly-Si on oxide shows very significant grain growth, as expected. In contrast, the poly-Si deposited on SOI showed no grain boundaries after annealing, transforming into a single crystal material with a fairly high density of stacking faults. Possible uses and drawbacks of this approach for solar cell applications will be discussed.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

scholarly journals A Flexible PI/Si/SiO2 Piezoresistive Microcantilever for Trace-Level Detection of Aflatoxin B1

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu
Keyword(s):  
Single Crystal ◽  
Aflatoxin B1 ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Wheatstone Bridge ◽  
Silicon On Insulator ◽  
Passivation Layer ◽  
Spring Constant ◽  
Trace Level ◽  
Crystal Silicon

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

AbstractPower devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (> 1000 °C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer, thereby preventing their applications to compact devices, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (< 1 × 10–4 Ω cm2) and high breakdown voltage VBD (~ 100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

Abstract Power devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (>1000°C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer1, thereby preventing their applications to compact devices2, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon3). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (<1×10-4 Ωcm2) and high breakdown voltage VBD (~100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

Transfer of an ultrathin single crystal silicon film from a Silicon On Insulator to a polymer

2020 ◽  
pp. 100107
Author(s):  
L.G. Michaud ◽  
E. Azrak ◽  
C. Castan ◽  
F. Fournel ◽  
F. Rieutord ◽  
...  
Keyword(s):  
Single Crystal ◽  
Silicon Film ◽  
Single Crystal Silicon ◽  
Silicon On Insulator ◽  
Crystal Silicon

Thermal Conductivity of Ultra Thin Single Crystal Silicon Layers: Part II — Experimental Data and Modeling at High Temperatures

2004 ◽  
Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi ◽  
K. E. Goodson
Keyword(s):  
Experimental Data ◽  
Thermal Conductivity ◽  
Single Crystal ◽  
High Temperatures ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Boltzmann Transport ◽  
Crystal Silicon ◽  
Strained Si

Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.

Analysis and Design of Electrothermal Actuators Fabricated From Single Crystal Silicon

2000 ◽  
Author(s):  
John M. Maloney ◽  
Don L. DeVoe ◽  
David S. Schreiber
Keyword(s):  
Single Crystal ◽  
Thermal Strain ◽  
Single Crystal Silicon ◽  
Elastic Beam ◽  
Beam Theory ◽  
Silicon On Insulator ◽  
Conduction Model ◽  
Crystal Silicon ◽  
Analysis And Design ◽  
Thermal Actuators

Abstract Thermal actuators that deflect laterally by resistive heating have been fabricated in single crystal silicon (SCS) by deep reactive ion etching (DRIE). With heights of 50 μm, these high-aspect actuators produce significantly larger forces than similar polysilicon devices. Problems with stiction are also avoided through the use of silicon-on-insulator (SOI) technology. An analytical model is applied to U-beam and V-beam actuator shapes fabricated on SOI wafers. The electrothermal component of the analysis uses an axial conduction model to predict temperature distribution; the thermomechanical component employs elastic beam theory to calculate deflection due to thermal strain. Experimental results are compared to analytical predictions. Deflections of 29 μm for a 1200 μm long, 12 μm wide V-beam actuator were observed, corresponding to a predicted force of 7.6 mN.

Low-background single-crystal silicon sample holders for neutron powder diffraction

2007 ◽  
Vol 40 (3) ◽  
pp. 489-495 ◽  
Author(s):  
M. Potter ◽  
H. Fritzsche ◽  
D. H. Ryan ◽  
L. M. D. Cranswick
Keyword(s):  
Single Crystal ◽  
Single Crystal Silicon ◽  
Neutron Powder Diffraction ◽  
The Other ◽  
Silicon Sample ◽  
Large Area ◽  
Crystal Silicon ◽  
Low Background ◽  
Plate Geometry ◽  
Null Matrix

Neutron diffraction measurements on weakly scattering or highly absorbing samples may demand custom mounting solutions. Two low-background sample holders based on inexpensive single-crystal silicon are described. One uses a conventional cylindrical geometry and is optimized for weakly scattering materials, while the other has a large-area flat-plate geometry and is designed for use with highly absorbing samples. Both holders yield much lower backgrounds than more conventional null-matrix or null-scattering materials and are essentially free from interfering Bragg peaks.

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