Octahedral Void Defects Causing Gate-Oxide Defects In Moslsis

1996 ◽  
Vol 442 ◽  
Author(s):  
Manabu Itsumi

AbstractWe found oxide defects originating in standard Czochralski silicon and proposed the sacrificial oxidation method to eliminate these defects in about 1979. Later, N2 annealing and H2 annealing methods were proposed successively, and these three elimination methods have been successfully introduced into actual fabrication lines for highly reliable integrated circuits. However, the origin of the defect was not clarified until recently. We combined copper decoration and TEM in order to observe the origin of the oxide defects and for the first time, observed octahedral void defects systematically at the oxide defects with standard Czochralski silicon. The sizes of the defects are typically 0.1–0.2 microns. These Si-crystalline defects are the origin of oxide defects and, at the same time, may be the origin of crystal originated particles. Recently, we have observed octahedral void defects in the bulk of the standard Czochralski silicon too. Some experimental findings suggest that some impurities on the side wall of the octahedral void defect induce dielectric breakdown of the gate-oxides.

1998 ◽  
Vol 37 (Part 1, No. 3B) ◽  
pp. 1228-1235 ◽  
Author(s):  
Manabu Itsumi ◽  
Takemi Ueki ◽  
Masaki Watanabe ◽  
Norikuni Yabumoto

1997 ◽  
Vol 70 (10) ◽  
pp. 1248-1250 ◽  
Author(s):  
Takemi Ueki ◽  
Manabu Itsumi ◽  
Tadao Takeda

2009 ◽  
Vol 156-158 ◽  
pp. 261-267 ◽  
Author(s):  
Jia He Chen ◽  
Xiang Yang Ma ◽  
De Ren Yang

The novel concept of “impurity engineering in CZochralski (CZ) silicon ” for large scaled integrated circuits has been reviewed. By doping with a certain impurities into CZ silicon materials intentionally, such as nitrogen (N), germanium (Ge) and even carbon (C, with high concentration), internal gettering ability of CZ silicon wafers could be improved. Meanwhile, void defects in CZ silicon wafer could be easily eliminated during annealing at higher temperatures. Furthermore, it was also found that the mechanical strength could be increased, so that breakage of wafers decreased. Thus, it is believed that by impurity engineering CZ silicon wafers can satisfy the requirment of ultra large scale integrated circuits.


1999 ◽  
Vol 86 (4) ◽  
pp. 2330-2333 ◽  
Author(s):  
Manabu Itsumi ◽  
Masahiko Maeda ◽  
Takemi Ueki ◽  
Satoshi Tazawa

1995 ◽  
Vol 378 ◽  
Author(s):  
Subhash M. Joshi ◽  
Ylrich M. GÖsele ◽  
Teh Y. Tan

AbstractGettering is widely used for fabricating integrated circuits using Si substrates, and has great potential for solar cell fabrications as well. Recently available solar cell efficiency studies have shown the benefits of the wafer backside Al, attributable to effects of gettering, a wafer backside field, and passivation of grain boundaries and dislocations. In this paper, we report experimental results which showed unambiguously that Czochralski Si wafer bulk minority carrier diffusion lengths can be significantly improved due to gettering of impurities by wafer backside Al, which also provided a protection from environmental contamination.


1996 ◽  
Vol 35 (Part 1, No. 2B) ◽  
pp. 812-817 ◽  
Author(s):  
Manabu Itsumi ◽  
Hideo Akiya ◽  
Takemi Ueki ◽  
Masato Tomita ◽  
Masataka Yamawaki

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