Optical Furnace Annealing

1984 ◽  
Vol 35 ◽  
Author(s):  
Neil J. Barrett ◽  
D.C. Bartle ◽  
A.G. Todd ◽  
J.D. Grange
Keyword(s):  
Surface Morphology ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Furnace Annealing ◽  
Temperature Cycles ◽  
Rapid Annealing

ABSTRACTThe rapid annealing of Be implanted GaAs has produced electrical activations of 70% for doses of 5 × 1014 cm−2 and hole profiles similar to the as implanted distribution. Si implanted GaAs has also been investigated using doses of 1 and 2 × 1014 cm−2 with sheet resistivities of 40 Ω/square after rapid thermal annealing. GaAs has been annealed with W-Si on the surface for the application of self aligned gate FET technology. Temperature cycles upto 850°C are required to activate the implanted dopant. Such cycles do not cause inter diffusion between the W-Si and GaAs or deterioration of the metallisation surface morphology.

omparisons of Silicide Formation by Rapid Thermal Annealing and Conventional Furnace Annealing

1987 ◽  
Vol 92 ◽  
Author(s):  
E. Ma ◽  
M. Natan ◽  
B.S. Lim ◽  
M-A. Nicolet
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Silicide Formation ◽  
X Ray Diffraction ◽  
Furnace Annealing ◽  
Cross Sectional ◽  
Conventional Furnace ◽  
Diffusion Controlled ◽  
Conventional Furnace Annealing ◽  
Kinetics Of

ABSTRACTSilicide formation induced by rapid thermal annealing (RTA) and conventional furnace annealing (CFA) in bilayers of sequentially deposited films of amorphous silicon and polycrystalline Co or Ni is studied with RBS, X-ray diffraction and TEM. Particular attention is paid to the reliability of the RTA temperature measurements in the study of the growth kinetics of the first interfacial compound, Co2Si and Ni2Si, for both RTA and CFA. It is found that the same diffusion-controlled kinetics applies for the silicide formation by RTA in argon and CFA in vacuum with a common activation energy of 2.1+0.2eV for Co2Si and 1.3+0.2eV for Ni Si. Co and Ni atoms are the dominant diffusing species; during silicide formation by both RTA and CFA. The microstructures of the Ni-silicide formed by the two annealing techniques, however, differs considerably from each other, as revealed by cross-sectional TEM studies.

Correlation Between Defect Characteristics and Layer Intermixing in Si Implanted GaAs/AIGaAs Superlattices

1989 ◽  
Vol 147 ◽  
Author(s):  
Samuel Chen ◽  
S.-Tong Lee ◽  
G. Braunstein ◽  
G. Rajeswaran ◽  
P. Fellinger
Keyword(s):  
Ion Implantation ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Peak Position ◽  
Compound Semiconductor ◽  
Subsequent Annealing ◽  
Semiconductor Superlattices ◽  
Furnace Annealing ◽  
Annealing Conditions ◽  
Induced Defects

AbstractDefects induced by ion implantation and subsequent annealing are found to either promote or suppress layer intermixing in Ill-V compound semiconductor superlattices (SLs). We have studied this intriguing relationship by examining how implantation and annealing conditions affect defect creation and their relevance to intermixing. Layer intermixing has been induced in SLs implanted with 220 keV Si+ at doses < 1 × 1014 ions/cm2 and annealed at 850°C for 3 hrs or 1050°C for 10 s. Upon furnace annealing, significant Si in-diffusion is observed over the entire intermixed region, but with rapid thermal annealing layer intermixing is accompanied by negligible Si movement. TEM showed that the totally intermixed layers are centered around a buried band of secondary defects and below the Si peak position. In the nearsurface region layer intermixing is suppressed and is only partially completed at ≤1 × 1015 Si/cm2. This inhibition is correlated to a loss of the mobile implantation-induced defects, which are responsible for intermixing.

Susceptor and Proximity Rapid Thermal Annealing of InP

1990 ◽  
Vol 181 ◽  
Author(s):  
A. Katz ◽  
S. J. Pearton ◽  
M. Geva
Keyword(s):  
Surface Morphology ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Substrate Surface ◽  
Effective Surface ◽  
Group V ◽  
Surface Protection ◽  
Pit Formation ◽  
Annealing Cycle ◽  
Inp Substrates

ABSTRACTAn intensive comparison between the efficiency of InP rapid thermal annealing within two types of SiC-coated graphite susceptors and by using the more conventional proximity approach, in providing degradation-free substrate surface morphology, was carried out. The superiority of annealing within a susccptor was clearly demonstrated through the evaluation of AuGe contact performance to carbon-implanted InP substrates, which were annealed to activate the implants prior to the metallization. The susceptor annealing provided better protection against edge degradation, slip formation and better surface morphology, due to the elimination of P outdiffusion and pit formation. The two SiC-coated susceptors that were evaluated differ from each other in their geometry. The first type must be charged with the group V species prior to any annealing cycle. Under the optimum charging conditions, effective surface protection was provided only to one anneal (750°C, 10s) of InP before charging was necessary. The second contained reservoirs for provision of the group V element partial pressure, enabled high temperature annealing at the InP without the need for continual recharging of the susceptor. Thus, one has the ability to subsequentially anneal a lot of InP wafers at high temperatures without inducing any surface deterioration.

Rapid Thermal Annealing of Neutron Transmutation Toped Czochralski Silicon

1992 ◽  
Vol 262 ◽  
Author(s):  
G. M. Berezina ◽  
F. P. Kdrshunov ◽  
N. A. Sobolev ◽  
A. V. Voevodova ◽  
A. A. Stuk
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Neutron Irradiation ◽  
Irradiation Temperature ◽  
Electrical Parameters ◽  
Furnace Annealing ◽  
Annealing Behaviour ◽  
Czochralski Silicon ◽  
Neutron Transmutation

ABSTRACTThe influence of the rapid thermal annealing (RTA) in comparison with that of the standard furnace annealing (FA) on the electrical parameters and photoluminescence (PL) of Czochralski silicon (Cz Si) subjected to neutron irradiation at various temperatures has been studied. The role of the irradiation temperature on the annealing behaviour of electrical parameters in Cz Si has been established. The possibility of getting neutron transmutation doped (NTD) Cz Si having the calculated resistivity by means of the RTA is shown.

Comparison Between Rapid Thermal and Furnace Annealing for A-Si Solid Phase Crystallization

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen J. Fonash ◽  
Osama Awadelkarim ◽  
John Mehlhaff
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Growth Time ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Lower Growth ◽  
Transient Time

AbstractRapid thermal annealing and furnace annealing for the solid phase crystallization of amorphous silicon thin films deposited using PECVD from argon diluted silane have been compared. Results reveal that the crystallization time, the growth time, and the transient time are temperature activated, and that the resulting polycrystalline silicon grain size is inversely proportional to the annealing temperature, for both furnace annealing and rapid thermal annealing. In addition, rapid thermal annealing was found to result in a lower transient time, a lower growth time, a lower crystallization time, and smaller grain sizes than furnace annealing, for a given annealing temperature. Interestingly, the transient time, growth time, and crystallization time activation energies are much lower for rapid thermal annealing, compared to furnace annealing.We propose two models to explain the observed differences between rapid thermal annealing and furnace annealing.

Rapid Thermal Annealing of Composite TaSi2/n+ Poly-Si Silicide Films

1983 ◽  
Vol 23 ◽  
Author(s):  
D.L. Kwong ◽  
R. Kwor ◽  
B.Y. Tsaur ◽  
K. Daneshvar
Keyword(s):  
Electron Microscopy ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealed Sample ◽  
Vlsi Circuits ◽  
X Ray Diffraction ◽  
Furnace Annealing ◽  
X Ray ◽  
Transmission Electron ◽  
Average Grain Size

ABSTRACTThe formation of composite TaSi2/n+ Poly-Si silicide films through the use of rapid thermal annealing (RTA) is investigated by x-ray diffraction, four point probe, scanning Auger microprobes (SAM) with ion sputter etching, transmission electron microscopy (TEM), scanning electron microscopy (SEM), and capacitance-voltage (C-V) measurements. 0.2 μm polysilicon is deposited on oxidized Si wafer by LPCVD and doped with phosphorus. A layer of 2200 A TaSix is then co-sputtered on polysilicon samples from separate targets. These as-deposited films are then annealed by RTA in an argon ambient for 1 sec. and 10 sec. at various temperatures. X-ray diffraction and SAM results show the rapid formation of a uniform stoichiometric tantalum disilicide via Si migration from polysilicon. TEM micrographs show simlilar results for samples annealed at 1000°C in furnace for 30 min. or by RTA for 1 sec., exhibiting average grain size greater than 1000 A. Sheet resistance of samples annealed by furnace annealing and RTA are comparable. SEM micrographs indicate that the surface morphology of the RTA-annealed sample is superior to that obtained by furnace annealing. These results show that RTA may offer a practical solution to low-resistivity silicide formation in VLSI circuits.

Integrated Processinyg of Silicided Shallow Junctions using Rapid Thermal Annealing Prior to Dopant Activation

1989 ◽  
Vol 146 ◽  
Author(s):  
Leonard Rubin ◽  
Nicole Herbots ◽  
JoAnne Gutierrez ◽  
David Hoffman ◽  
Di Ma
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Titanium Silicide ◽  
Silicon Substrates ◽  
Sheet Resistivity ◽  
Furnace Annealing ◽  
Dopant Activation ◽  
Silicide Layer ◽  
Low Leakage ◽  
Sputter Deposited

ABSTRACTA method for producing shallow silicided diodes for MOS devices (with junction depths of about 0.1 µm), by implanting after forming the silicide layer was investigated. The key to this integrated process is the use of rapid thermal annealing (RTA) to activate the dopants in the silicon, so that there is very little thermal broadening of the implant distribution. Self-aligned titanium silicide (TiSi2) films with thicknesses ranging from 40 to 80 nm were grown by RTA of sputter deposited titanium films on silicon substrates. After forming the TiSi2, arsenic and boron were implanted. A second RTA step was used after implantation to activate these dopants. It was found that implanting either dopant caused a sharp increase in the sheet resistivity of the TiSi2. The resistivity can be easily restored to its original value (about 18 µΩ-cm) by a post implant RTA anneal. RBS analysis showed that arsenic diffuses rapidly in the TiSi2 during RTA at temperatures as low as 600°C. SIMS data indicated that boron was not mobile up to temperatures of 900°C, possibly because it forms a compound with the titanium which precipitates in the TiSi 2. Coalescence of TiSi2 occurs during post implant furnace annealing, leading to an increase in the sheet resistivity. The amount of coalescence depends on the film thickness, but not on whether or not the film had been subject to implantation. Spreading resistance profiling data showed that both arsenic and boron diffused into the TiSi2 during furnace annealing, reducing the surface concentrations of dopant at the TiSi2/Si interface. Both N+/P and P+/N diodes formed by this technique exhibited low leakage currents after the second RTA anneal. This is attributed to removal of the implant damage by the RTA. In summary, the second RTA serves the dual purpose of removing implant damage in the TiSi2 and creating the shallow junction by dopant activation.

Approaches to modifying solid phase crystallization kinetics for a-Si films

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen Fonash ◽  
Osama Awadelkarim ◽  
Yuan-Mn Li
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Crystallization Kinetics ◽  
Solid Phase ◽  
Surface Treatments ◽  
Film Deposition ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Thermal Budget

AbstractThree approaches to modifying the solid phase crystallization kinetics of amorphous silicon thin films are examined with the goal of reducing the thermal budget and improving the poly-Si quality for thin film transistor applications. The three approaches consist of (1) variations in the PECVD a-Si deposition parameters; (2) the application of pre-fumace-anneal surface treatments; and (3) using both rapid thermal annealing and furnace annealing at different temperatures. We also examine the synergism among these approaches.Results reveal that (1) film deposition dilution and dilution/temperature changes do not strongly affect crystallization time, but do affect grain size; (2) pre-anneal surface treatments can dramatically reduce the solid phase crystallization thermal budget for diluted films and act synergistically with deposition dilution or dilution/temperature effects; and (3) rapid thermal annealing leads to different crystallization kinetics from that seen for furnace annealing.

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