Improvement of Grain Size by Crystallization of Double-Layer Amorphous Silicon Films

1994 ◽  
Vol 345 ◽  
Author(s):  
Dae Gyu Moon ◽  
Jeong No Lee ◽  
Ho Bin Im ◽  
Byung Tae Ahn ◽  
Kee Soo Nam ◽  
...  

AbstractWe investigated the solid phase crystallization (SPC) behavior of 1000 Å amorphous Si (a- Si) films deposited by plasma enhanced chemical vapor deposition (PECVD) at various temperatures and were able to enhance the grain size of the crystallized polysilicon films using double layers of a-Si filns. The deposition temperature of monolayer a-Si films varied from 200 to 400 °C and the films were recrystallized at 600 °C in nitrogen. As the deposition temperature increased, the incubation time was decreased and both the nucleation rate and growth rate were increased. Especially, the nucleation rate strongly depended on the deposition temperature.Since the Si-SiO2 interface provides a large number of nucleation sites, it is desirable to suppress nucleation at the interface. As an idea we employed a structure with double layer a-Si films. The bottom a-Si layer deposited at lower temperature could suppress the nucleation at the Si-SiO2 interface while the top a-Si layer deposited at higher temperature could nucleate with a smaller number of nucleation sites. The incubation time and transformation behavior were determined by the deposition temperature of the top layer. As an example, the grain size of the double layer film deposited sequentially at 150 °C and 200 °C enhanced to 1.8 μm while that of the monolayer film deposited at 200 °C was 1.4 μm.

1997 ◽  
Vol 485 ◽  
Author(s):  
Claudine M. Chen ◽  
Harry A. Atwater

AbstractWith a selective nucleation and solid phase epitaxy (SNSPE) process, grain sizes of 10 μm have been achieved to date at 620°C in 100 nrm thick silicon films on amorphous SiO2, with potential for greater grain sizes. Selective nucleation occurs via a thin film reaction between a patterned array of 20 rnm thick indium islands which act as heterogeneous nucleation sites on the amorphous silicon starting material. Crystal growth proceeds by lateral solid phase epitaxy from the nucleation sites, during the incubation time for random nucleation. The largest achievable grain size by SNSPE is thus approximately the product of the incubation time and the solid phase epitaxy rate. Electronic dopants, such as B, P, and Al, are found to enhance the solid phase epitaxy rate and affect the nucleation rate.


2000 ◽  
Vol 15 (7) ◽  
pp. 1630-1634 ◽  
Author(s):  
A. Rodríguez ◽  
J. Olivares ◽  
C. González ◽  
J. Sangrador ◽  
T. Rodríguez ◽  
...  

The crystallization kinetics and film microstructure of poly-SiGe layers obtained by solid-phase crystallization of unimplanted and C- and F-implanted 100-nm-thick amorphous SiGe films deposited by low-pressure chemical vapor deposition on thermally oxidized Si wafers were studied. After crystallization, the F- and C-implanted SiGe films showed larger grain sizes, both in-plane and perpendicular to the surface of the sample, than the unimplanted SiGe films. Also, the (111) texture was strongly enhanced when compared to the unimplanted SiGe or Si films. The crystallized F-implanted SiGe samples showed the dendrite-shaped grains characteristic of solid-phase crystallized pure Si. The structure of the unimplanted SiGe and C-implanted SiGe samples consisted of a mixture of grains with well-defined contour and a small number of quasi-dendritic grains. These samples also showed a very low grain-size dispersion.


1995 ◽  
Vol 403 ◽  
Author(s):  
Yaozu Wang ◽  
Reece Kingi ◽  
Osama O. Awadelkarim ◽  
Stephen J. Fonash

AbstractPlasma-enhanced chemical vapor deposition was used to deposit a-Si:H thin films (∼ 1000 Å) at various temperatures below 300°C on Coming 7059 glass substrates using a silane-based plasma. These films were used as precursor materials to produce solid phase crystallized polycrystalline silicon (poly-Si) by conventional furnace annealing at 600°C in N2 ambient. The precursor a-Si and final poly-Si films were examined using spectroscopic ellipsometry and transmission electron microscopy. Precursor film deposition temperatures were found to affect the void density in the a-Si film and grain size in the resulting poly-Si film with lower deposition temperatures leading to higher void density in the a-Si film and larger grain size in the poly-Si film.


1996 ◽  
Vol 448 ◽  
Author(s):  
Eui-Hoon Hwang ◽  
Jae-Sang Ro

AbstractA novel method for the fabrication of poly-Si films with a large grain size is reported using solid phase crystallization (SPC) of LPCVD amorphous Si films by nucleation interface control. The reference films used in this study were 1000 Ǻ -thick a-Si films deposited at 500°C at a total pressure of 0.35 Torr using Si2H6/He. Since the deposition condition changes the incubation time, i.e. nucleation rate, and since nucleation occurs dominantly at a-Si/SiO2 interface, we devised the following deposition techniques for the first time in order to obtain the larger gain size. A very thin a-Si layer (~ 50 Ǻ) with the deposition conditions having long incubation time is grown first and then the reference films (~ 950 Ǻ) are grown successively. Various composite films with different combinations were tested. The crystallization kinetics of composite films was observed to be determined by the deposition conditions of a thin a-Si layer at the a-Si/SiO2 interface. Nucleation interface was also observed to be modified by interrupted gas supply resulting in the enhancement of the grain size.


1989 ◽  
Vol 149 ◽  
Author(s):  
J. Kanicki ◽  
E. Hasan ◽  
D. F. Kotecki ◽  
T. Takamori ◽  
J. H. Griffith

ABSTRACTDevice quality undoped hydrogenated microcrystalline silicon has been prepared by plasma enhanced chemical vapor deposition under different conditions. The dependence of physical, chemical, structural, and electrical properties on the deposition conditions has been investigated. Conductive (conductivity above 10−3Ω−1 cm−1) and resistive (conductivity around 10−9Ω−1cm−1) layers having approximately the same grain size, at a given substrate temperature, have been deposited between 200 and 500°C at two different hydrogen dilutions. Independently of the hydrogen dilution, the average grain sized is dependent on the deposition temperature and the film thickness; and a maximum average grain size of about 40 nm has been achieved for a thick film deposited at 500°C. The density of paramagnetic defects also increases with increasing deposition temperature, which indicates that more dangling bond defects are introduced as the total area of the grain boundaries increases. The etch rate decreases with increasing deposition temperature, and for the films deposited at 250 and 500°C the etch rate has been measured to be 6.6 and 2.7 nm/min, respectively. Thin film transistors incorporating a microcrystalline channel have been fabricated and evaluated. The best device had the following properties: field effect mobility, threshold voltage, and on/off current ratio of about 0.8 cm2/V sec, below 5 V, and around 106, respectively.


2009 ◽  
Vol 421-422 ◽  
pp. 87-90 ◽  
Author(s):  
Masaki Hirano ◽  
Kazuhisa Kawano ◽  
Hiroshi Funakubo

The deposition mechanism of metal-Ru films including incubation time was investigated for Ru films prepared by metal organic chemical vapor deposition from (2,4-Dimethylpentadienyl)(ethylcyclopentadienyl)Ruthenium (DER) - O2 system. Substrates with amorphous top-layer having various Hf/Si ratio, SiO2 (native oxide)/(001)Si (SiO2), HfSiON/SiON/(001)Si (HfSiON) and HfO2/SiON/(001)Si (HfO2), were used as substrates. The deposition temperature dependence of the deposition amount at the fixed deposition time ranging from 210 oC to 300 oC revealed that the deposition amount depended on the deposition temperature below 250 oC, while it was almost constant above this temperature. Incubation time depended on the kinds of substrate at 210 oC and the substrate surface was fully covered in a shorter time with smaller deposition amount for the substrates with shorter incubation time. In addition, the film with shorter incubation time had smaller surface roughness.


1996 ◽  
Vol 424 ◽  
Author(s):  
Y.-H. Song ◽  
S.-Y. Kang ◽  
K. I. Cho ◽  
H. J. Yoo ◽  
J. H. Kim ◽  
...  

AbstractThe substrate effects on the solid-phase crystallization of amorphous silicon (a-Si) have been extensively investigated. The a-Si films were prepared on two kinds of substrates, a thermally oxidized Si wafer (SiO2/Si) and a quartz, by low-pressure chemical vapor deposition (LPCVD) using Si2H6 gas at 470 °C and annealed at 600 °C in an N2 ambient for crystallization. The analysis using XRD and Raman scattering shows that crystalline nuclei are faster formed on the SiO2/Si than on the quartz, and the time needed for the complete crystallization of a-Si films on the SiO2/Si is greatly reduced to 8 h from ˜15 h on the quartz. In this study, it was first observed that crystallization in the a-Si deposited on the SiO2/Si starts from the interface between the a-Si film and the thermal oxide of the substrate, called interface-induced crystallization, while random nucleation process dominates on the quartz. The very smooth surface of the SiO2/Si substrate is responsible for the observed interface-induced crystallization of a-Si films.


2017 ◽  
Vol 895 ◽  
pp. 28-32 ◽  
Author(s):  
Hua Cheng ◽  
Di Wang ◽  
Feng Li Li

Micro-Si films were deposited using Ar diluted SiH4 gaseous mixture by electron cyclotron resonance plasma-enhanced chemical vapor deposition (ECR-PECVD). The effects of the substrate temperature on microstructure and electrical conductivity of micro-Si film were investigated. The results show that, with the increasing of substrate temperature, crystallinity and grain size increased monotonously, of which a competing balance would determine the electrical conductivity of micro-Si films. Based on these results, relatively small grain size and appropriate crystallinity would be beneficial to improve the electrical properties of micro-Si films.


1995 ◽  
Vol 403 ◽  
Author(s):  
J. H. Lee ◽  
C. W. Hwang ◽  
J. E. Shin ◽  
Y. S. Jin ◽  
S. B. Mah

AbstractThe solid phase crystallization behavior of argon ion (Ar+) implanted very thin polycrystalline silicon (poly-Si) films has been investigated. Poly-Si films of 500Å thickness were deposited at 625°C by low pressure chemical vapor deposition (LPCVD). The films were amorphized by Ar+ implantation with 7 ° tilt angle. The amount of ions implanted was varied from 2.0 × 1013 cm-2 to 1.2 × 1015 cm-2 and the acceleration voltages from 40KeV to 120KeV. The films were recrystallized by furnace annealing at 580°C for 48 hours in N2 atmosphere, followed by 1000°C annealing The crystallinity of the recrystallized Si films and the distribution of the argon atoms in the film were investigated. It was found that the crystallinity strongly depended on the Ar+ implantation dose. The average grain size of Ar+ implanted film was about 0.25μm, which was smaller than that of Si+ implanted film of the same dose, 0.45μm. Ar atoms retarded the grain growth rate during the annealing process and the excess Ar atoms in Si films were segregated at the surface of silicon films after 1000°C annealing Poly-Si thin film transistors (TFTs) were fabricated at high temperature using Ar+ implantation technique. Remarkable electrical characteristics (Ids- Vgs) were obtained such as an electron mobility of 35 cm2/V.s, which was attributed to the enhancement of crystallinity by Ar+ implantation. But, segregated Ar atoms near the interface would give rise to structural deformation and crystalline defects which can act as the scattering and’ trapping centers for carriers.


1984 ◽  
Vol 35 ◽  
Author(s):  
K. T-Y. Kung ◽  
R. B. Ivepson ◽  
R. Reif

ABSTRACTPolycrystalline silicon films 4800 Å thick deposited via low pressure chemical vapor deposition on oxidized silicon wafers have been amorphized by silicon ion implantation and subsequently recrystallized at 700°C. Due to channeling of the ions through grains whose <110> axes were sufficiently parallel to the beam, these grains survived the implantation step and acted as seed crystals for the solid-phase epitaxial regrowth of the film. This work suggests the feasibility of combining ion implantation and furnace annealing to generate large-grain, uniformly oriented polycrystal1ine films on amorphous substrates. It is a potential low-temperature silicon-on-insulator technology.


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