High Gain, Low Noise InP Heut for Millimeter-Wave Application

1993 ◽  
Vol 300 ◽  
Author(s):  
C. Yuen ◽  
Y. C. Pao ◽  
N. Chiang ◽  
N. G. Bechtel
Keyword(s):  
Millimeter Wave ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Wave Region ◽  
Lattice Matched ◽  
Inp Hemt

ABSTRACTLattice matched InP HEMT has demonstrated superior gain and noise figure performance compared to the AlGaAs HEMT and PHEMT. The gain and noise figure advantages of the InP HEMT have been transferred to the excellent MMIC performance in the millimeter-wave region.

A Low-Noise, High-Gain Quasi-Millimeter-Wave Receiver MMIC with a Very High Degree of Integration Using 3D-MMIC Technology

2011 ◽  
Vol E94-C (10) ◽  
pp. 1548-1556 ◽  
Author(s):  
Takana KAHO ◽  
Yo YAMAGUCHI ◽  
Kazuhiro UEHARA ◽  
Kiyomichi ARAKI
Keyword(s):  
Millimeter Wave ◽  
High Gain ◽  
Low Noise ◽  
High Degree ◽  
Very High ◽  
Millimeter Wave Receiver

scholarly journals A 5.7GHz low noise figure ultra high gain CMOS LNA with inter stage technique

2010 ◽  
Vol 7 (23) ◽  
pp. 1686-1693 ◽  
Author(s):  
Ehsan Kargaran ◽  
Hojat Khosrowjerdi ◽  
Karim Ghaffarzadegan ◽  
Hooman Nabovati
Keyword(s):  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Cmos Lna

scholarly journals A 60 GHz fully differential LNA in 90 nm CMOS technology

2013 ◽  
Vol 6 (2) ◽  
pp. 109-113 ◽  
Author(s):  
Andrea Malignaggi ◽  
Amin Hamidian ◽  
Georg Boeck
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Transmission Lines ◽  
Noise Figure ◽  
Design Procedure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
60 Ghz ◽  
Fully Differential

The present paper presents a fully differential 60 GHz four stages low-noise amplifier for wireless applications. The amplifier has been optimized for low-noise, high-gain, and low-power consumption, and implemented in a 90 nm low-power CMOS technology. Matching and common-mode rejection networks have been realized using shielded coplanar transmission lines. The amplifier achieves a peak small-signal gain of 21.3 dB and an average noise figure of 5.4 dB along with power consumption of 30 mW and occupying only 0.38 mm2pads included. The detailed design procedure and the achieved measurement results are presented in this work.

Inductive Feedback Technique for Design of High Gain 0.18μm CMOS LNA for 5G Applications

2021 ◽  
pp. 2150236
Author(s):  
Anjana Jyothi Banu ◽  
G. Kavya ◽  
D. Jahnavi
Keyword(s):  
Reflection Coefficient ◽  
Noise Figure ◽  
Cmos Technology ◽  
High Gain ◽  
Low Noise ◽  
Common Source ◽  
Matching Network ◽  
Input Matching ◽  
Cmos Lna ◽  
Noise Amplifier

A 26[Formula: see text]GHz low-noise amplifier (LNA) designed for 5G applications using 0.18[Formula: see text][Formula: see text]m CMOS technology is proposed in this paper. The circuit includes a common-source in the first stage to suppress the noise in the amplifier. The successive stage has a Cascode topology along with an inductive feedback to improve the power gain. The input matching network is designed to achieve the input reflection coefficient less than [Formula: see text]7dB at the intended frequency. The matching network at the output is designed using inductor–capacitor (LC) components connected in parallel to attain the output reflection coefficient of [Formula: see text]10[Formula: see text]dB. Due to the inductor added in feedback at the second stage. The [Formula: see text] obtained is 18.208[Formula: see text]dB at 26[Formula: see text]GHz with a noise figure (NF) of 2.8[Formula: see text]dB. The power supply given to the LNA is 1.8[Formula: see text]V. The simulation and layout of the presented circuit are performed using Cadence Virtuoso software.

Design of Low-Noise Two-Path Amplifier for 6–16 GHz Applications

2020 ◽  
pp. 2150136
Author(s):  
Asieh Parhizkar Tarighat ◽  
Mostafa Yargholi
Keyword(s):  
Noise Figure ◽  
Impedance Matching ◽  
High Gain ◽  
Low Noise ◽  
Cmos Process ◽  
Input Matching ◽  
Inductive Peaking ◽  
Linearity Improvement ◽  
Noise Amplifier ◽  
Path Structure

A two-path low-noise amplifier (LNA) is designed with TSMC 0.18[Formula: see text][Formula: see text]m standard RF CMOS process for 6–16[Formula: see text]GHz frequency band applications. The principle of a conventional resistive shunt feedback LNA is analyzed to demonstrate the trade-off between the noise figure (NF) and the input matching. To alleviate the mentioned issue for wideband application, this structure with noise canceling technique and linearity improvement are applied to a two-path structure. Flat and high gain is supplied by the primary path; while the input and output impedance matching are provided by the secondary path. The [Formula: see text][Formula: see text]dB bandwidth can be increased to a higher frequency by inductive peaking, which is used at the first stage of the two paths. Besides, by biasing the transistors at the threshold voltage, low power dissipation is achieved. The [Formula: see text][Formula: see text]dB gain bandwidth of the proposed LNA is 10[Formula: see text]GHz, while the maximum power gain of 13.1[Formula: see text]dB is attained. With this structure, minimum NF of 4.6[Formula: see text]dB and noise flatness of 1[Formula: see text]dB in the whole bandwidth can be achieved. The input impedance is matched, and S[Formula: see text] is lower than [Formula: see text]10 dB. With the proposed linearized LNA, the average IIP[Formula: see text][Formula: see text]dBm is gained, while it occupies 1051.7[Formula: see text][Formula: see text]m die area.

High Gain and Low Noise Single Balanced Wireless Receiver Front-End Circuit Design

2013 ◽  
Vol 284-287 ◽  
pp. 2647-2651
Author(s):  
Zhe Yang Huang ◽  
Che Cheng Huang ◽  
Jung Mao Lin ◽  
Chung Chih Hung
Keyword(s):  
Return Loss ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Total Power ◽  
Cmos Process ◽  
Chip Area ◽  
Wireless Receiver ◽  
Front End ◽  
Total Power Consumption

This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.

Toward highly scaled AlN/GaN-on-Silicon devices for millimeter wave applications

2013 ◽  
Vol 5 (3) ◽  
pp. 335-340 ◽  
Author(s):  
Farid Medjdoub ◽  
Yoann Tagro ◽  
Bertrand Grimbert ◽  
Damien Ducatteau ◽  
Nathalie Rolland
Keyword(s):  
Millimeter Wave ◽  
Noise Figure ◽  
Infrared Camera ◽  
Cost Effective ◽  
Low Noise ◽  
Silicon Devices ◽  
Heating Effects ◽  
Drain Bias ◽  
High Carrier ◽  
Gan On Si

In this work, the possibility of achieving GaN-on-Si devices for millimeter wave applications operating at high bias is demonstrated. It is shown that highly scaled AlN/GaN-on-Si double heterostructure enables us to significantly improve electron confinement under high electric field as compared to single heterostructure while delivering high carrier density (>2 × 1013 cm−2). Subsequently, trapping effects can be minimized resulting in the highest GaN-on-Si output power density up to 40 GHz and at a drain bias of 15 V together with a record fmax close to 200 GHz. At higher bias, infrared camera analysis clearly shows that these devices are mainly limited by self-heating effects. Furthermore, low noise figure has been assessed on this heterostructure, promising integration of cost effective low noise and high power millimeter wave amplifiers.

Very Compact High-Gain Broadband Low-Noise Amplifier in InP HEMT Technology

2006 ◽  
Vol 54 (12) ◽  
pp. 4565-4571 ◽  
Author(s):  
Satoshi Masuda ◽  
Toshihiro Ohki ◽  
Tatsuya Hirose
Keyword(s):  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Noise Amplifier ◽  
Inp Hemt
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