Study on the Photoconductive Effect from a P/N Junction Structure Incorporated with Porous Silicon

1992 ◽  
Vol 283 ◽  
Author(s):  
C. C. Yeh ◽  
Klaus Y.J. Hsu ◽  
P. C. Chen ◽  
H. L. Hwang
Keyword(s):  
Electrochemical Etching ◽  
Metal Contacts ◽  
Porous Si ◽  
Type Region ◽  
Direction Parallel ◽  
Current Voltage ◽  
P Type ◽  
Distinct Features ◽  
Junction Structure ◽  
Planar Fabrication

ABSTRACTWe utilized the conventional planar fabrication technique and the electrochemical etching method to prepare porous Si layers in the p-type region of a p/n junction, which could make the study on the transverse transport property of this material possible. The junctions were fabricated by low energy ion-implantation, with porous Si formed perpendicular to the junction and between two metal contacts. This structure confines currents to the direction parallel to the surface. Distinct features on current-voltage (I-V) curves has been observed.

Current–Voltage Characteristics of Porous Silicon Made from A P/N Junction Structure

1991 ◽  
Vol 256 ◽  
Author(s):  
Y. J. Hsu ◽  
L. K. Samanta ◽  
K. C. Wang ◽  
P. C. Chen ◽  
H. L. Hwang
Keyword(s):  
Carrier Transport ◽  
Ohmic Contacts ◽  
Electrochemical Etching ◽  
Porous Si ◽  
Direction Parallel ◽  
Sudden Rise ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Junction Structure ◽  
Electrical Data

ABSTRACTWe have made studies on the TRANSVERSE transport properties of the porous Si made from a novel P/N junction structure. The structures of porous Si were examined for various electrochemical etching conditions and they were correlated with the electrical data. The junciton was fabricated by shallow diffusion, with porous Si formed perpendicular to the junction and between two indium ohmic contacts. This structure confines currents to the direction parallel to the surface. Distinct feature on I–V curves have been observed, including sudden rise of currents and the existence of negative differential resistances (NDR). The characteristics appeared stable and depended on the polarity of bias. Suggestions are made that the porous Si could be composed of microcrystals, and feasibility of carrier transport through quantum boxes responsible for the electrical behaviors are discussed.

The Current‐Voltage Characteristics of a Photoelectrochemical Cell Using p‐Type Porous Si

1985 ◽  
Vol 132 (2) ◽  
pp. 346-349 ◽  
Author(s):  
Nobuyoshi Koshida ◽  
Masahiro Nagasu ◽  
Takashi Sakusabe ◽  
Yuji Kiuchi
Keyword(s):  
Photoelectrochemical Cell ◽  
Porous Si ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
P Type

I-V and Surface Topography Study of Nanostructure Porous Silicon Layer Prepared by Electrochemical Etching

2012 ◽  
Vol 576 ◽  
pp. 519-522 ◽  
Author(s):  
Fadzilah Suhaimi Husairi ◽  
Maslihan Ain Zubaidah ◽  
Shamsul Faez M. Yusop ◽  
Rusop Mahmood Mohamad ◽  
Saifolah Abdullah
Keyword(s):  
Electrical Properties ◽  
Porous Silicon ◽  
Surface Topography ◽  
Electrochemical Etching ◽  
Silicon Layer ◽  
Porous Silicon Layer ◽  
Force Microscopy ◽  
Atomic Force ◽  
Current Voltage ◽  
P Type

This article reports on the electrical properties of porous silicon nanostructures (PSiNs) in term of its surface topography. In this study, the PsiNs samples were prepared by using different current density during the electrochemical etching of p-type silicon wafer. PSiNs has been investigated its electrical properties and resistances for different surface topography of PSiNs via current-voltage (I-V) measurement system (Keithley 2400) while its physical structural properties was investigated by using atomic force microscopy (AFM-XE100).

Luminescence Activation of Porous Silicon by Post-Anodization Treatment

1992 ◽  
Vol 283 ◽  
Author(s):  
A. Kux ◽  
F. Muller ◽  
F. Koch
Keyword(s):  
Particle Size ◽  
Chemical Composition ◽  
Porous Silicon ◽  
Depth Distribution ◽  
Electrochemical Etching ◽  
Relative Importance ◽  
Porous Si ◽  
Ambient Conditions ◽  
Photochemical Etching ◽  
P Type

ABSTRACTWe prepare “nonluminescing” porous Si by electrochemical etching (50 mA/cm2 in 50% HF diluted 1:1 with ethanol) of 1 Ω(100) p-type wafers in the absence of light in order to study the subsequent luminescence activation by postprocessing. The treatments are: photochemical etching, ageing under ambient conditions, thermal oxidation. The study reveals remarkable inhomogeneities in the depth distribution of the luminescence and allows us to comment on the relative importance of particle size, spin density and chemical composition for the luminescence.

ANOMALOUS BIAS DEPENDENCE OF THE NOISE IN POROUS SI LED

2004 ◽  
Vol 04 (02) ◽  
pp. L355-L364 ◽  
Author(s):  
BÉLA SZENTPÁLI ◽  
TIBOR MOHÁCSY ◽  
ISTVÁN BÁRSONY
Keyword(s):  
Low Frequency ◽  
Frequency Noise ◽  
Noise Power ◽  
Current Component ◽  
Porous Si ◽  
Current Voltage ◽  
Trap Assisted Tunneling ◽  
P Type ◽  
Parallel Current ◽  
Noise Spectra

The current-voltage characteristics and the low-frequency noise spectra of p-type Si–Porous Si–Al diode like structures were investigated. Over 1 V forward biases a reasonable fit was obtained in the Fowler-Nordheim plot. Any attempts of accurately fitting the I-V characteristic by other known transport mechanisms failed. At lower biases, however, an additional current-component appears which shows a saturating character. This current component is ascribed to trap-assisted tunneling. The measured noise spectra show 1/f character; however the magnitude of the noise shows saturation with increasing biases instead of the usual case, where the noise power scales with I2, or V2. This finding is interpreted by a model of two parallel current paths. The noise arising from the smaller and saturating current determines the noise performance of the whole device.

Characterization of SiO2/4H-SiC Interface by Device Simulation and Temperature Dependence of On-Resistance of SiC MOSFET

2014 ◽  
Vol 778-780 ◽  
pp. 993-996 ◽  
Author(s):  
Kenichi Ohtsuka ◽  
Shiro Hino ◽  
Akemi Nagae ◽  
Rina Tanaka ◽  
Yasuhiro Kagawa ◽  
...  
Keyword(s):  
Temperature Dependence ◽  
Conduction Band ◽  
Device Simulation ◽  
Trap Density ◽  
Interface Properties ◽  
Interface Traps ◽  
Type Region ◽  
Current Voltage ◽  
P Type

MOS interface traps are characterized by device simulation on the basis of temperature dependence of lateral MOS-TEG devices on the same Al-implanted p-type region as vertical device. The simulation shows fairly large Dit in SiO2/4H-SiC interface, corresponding to the suggested trap density inside the conduction band. Temperature dependence of on-resistance is explained by application of evaluated interface properties to calculation of current voltage properties of vertical DMOSFET.

scholarly journals Impact of Etching Time on Ideality Factor and Dynamic Resistance of Porous Silicon Prepared by Electrochemical Etching (ECE)

2017 ◽  
Vol 72 ◽  
pp. 28-36 ◽  
Author(s):  
Hasan A. Hadi
Keyword(s):  
Porous Silicon ◽  
Ideality Factor ◽  
Thermal Evaporation ◽  
Crystalline Silicon ◽  
Electrochemical Etching ◽  
Etching Time ◽  
Dynamic Resistance ◽  
Current Voltage ◽  
The One ◽  
P Type

In this work, porous silicon layers were fabricated on p-type crystalline silicon wafers using electrochemical etching ECE process. Al films were deposited onto porous layer /Si wafers by thermal evaporation to form rectifying junction. An investigation of the dependence on applied etching time to formed PS layer was studied. Effect etching time on the electrical properties of porous silicon is checked using Current–voltage I–V characteristics. The ideality factor and dynamic resistances are found to be large than the one and 20 (kΩ) respectively by the analysis of the dark I–V characteristics of Al/PS/p-Si heterojunction.

Electrical Studies of ZnO Nanowires and Metal Contacts

2015 ◽  
Vol 1131 ◽  
pp. 3-7
Author(s):  
Sattra Thongma ◽  
Artitsupa Boontan ◽  
Thitikorn Boonkoom ◽  
Kittipong Tantisantisom
Keyword(s):  
Indium Tin Oxide ◽  
Optoelectronic Device ◽  
Metal Electrode ◽  
Zno Nanowires ◽  
Metal Contacts ◽  
Voltage Measurement ◽  
Light Emitting ◽  
Current Voltage ◽  
P Type ◽  
A Current

ZnO nanowires are recently used in optoelectronic devices such as sensors, solar cells, and light emitting diodes due to its unique optical and electrical properties. In such devices, a contact between the ZnO nanowires and a metal electrode exists. Hence understanding electrical characteristic between the ZnO nanowires and a metal electrode can facilitate optoelectronic device design. In this work, ZnO nanowires were grown on Indium Tin Oxide (ITO) substrates using a hydrothermal method. Simple devices using the nanowires sandwiched between the ITO and a metal contact (i.e. Au, Al) were fabricated and characterized by a current-voltage measurement. Moreover, studies on p-n junctions between the ZnO nanowires and p-type polymers, poly(3,4-ethylenedioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) and poly(9,9-dioctylfluorene) (PFO), were also fabricated and characterized. The current-voltage measurement of devices clearly shows the rectifying behavior, which is an important characteristic of diodes.

D.C Current-Voltage Characteristics and Admittance Spectroscopy of an Al-Porous Si Barrier

1996 ◽  
Vol 452 ◽  
Author(s):  
K. Khirouni ◽  
J. C. Bourgoin ◽  
K. Borgi ◽  
H. Maaref ◽  
D. Deresmes ◽  
...  
Keyword(s):  
Frequency Dependence ◽  
Admittance Spectroscopy ◽  
Porous Si ◽  
Free Electrons ◽  
Si Substrates ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
P Type

AbstractWe present the temperature and frequency dependence of the current-voltage (I-V) characteristics of Al barriers deposited on porous Si grown on p-type Si substrates. These barriers exhibit a rectifying behaviour when the temperature is higher than 250 K. The I-V characteristics can be understood by a conduction in porous Si taking place via free electrons thermally excited from Pb centers associated with the existence of a SiO2-Si interface and via hopping between these Pb centers.

A comparative study of charge trapping effect in p-type MoTe2 and WSe2 FETs using pulsed current–voltage measurements

2021 ◽  
Vol 60 (1) ◽  
pp. 011003
Author(s):  
Jeong Yong Yang ◽  
Chan Ho Lee ◽  
Young Taek Oh ◽  
Jiyeon Ma ◽  
Junseok Heo ◽  
...  
Keyword(s):  
Comparative Study ◽  
Charge Trapping ◽  
Pulsed Current ◽  
Trapping Effect ◽  
Current Voltage ◽  
P Type
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