Use of Low Temperature Si MBE Growth Techniques for High Performance SiGe/Si Electronics

1992 ◽  
Vol 281 ◽  
Author(s):  
E. T. Croke ◽  
M. J. Harrell ◽  
M. E. Mierzwinski ◽  
J. D. Plummer
Keyword(s):  
Low Temperature ◽  
Heterojunction Bipolar Transistors ◽  
High Performance ◽  
Field Effect Transistors ◽  
Layer Growth ◽  
Layer By Layer ◽  
Strained Si ◽  
Mbe Growth ◽  
Sb Doping ◽  
Growth Method

ABSTRACTThrough the use of low temperature Si molecular beam epitaxy (MBE), we have fabricated high performance Si1−x Gex/Si heterojunction bipolar transistors (HBTs) and bipolar inversion-channel field effect transistors (BICFETs). Our growth method employs a high temperature Si-assisted desorption followed by MBE growth at a temperature only slightly in excess of the critical temperature for two-dimensional layer-by-layer growth. [1] At this temperature, segregation of Sb has previously been shown to be kinetically limited. [2] In addition, significantly more strain can be frozen into such an epitaxial layer as compared with those grown at higher temperatures.[3] Secondary ion mass spectroscopy (SIMS) data verify the abruptness of the Sb doping profiles in our device structures. High resolution x-ray diffraction (HRXRD) data are consistent with planar, coherently strained Si1−x Gex layers in our HBTs. A gain of 2690 (3210) is observed in our BICFETs at 300 K (7 K).

scholarly journals Nanonet: Low-temperature-processed tellurium nanowire network for scalable p-type field-effect transistors and a highly sensitive phototransistor array

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Muhammad Naqi ◽  
Kyung Hwan Choi ◽  
Hocheon Yoo ◽  
Sudong Chae ◽  
Bum Jun Kim ◽  
...  
Keyword(s):  
Low Temperature ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Optical Measurements ◽  
Electrical Performance ◽  
Large Area ◽  
Nanowire Network ◽  
P Type ◽  
Nanowire Networks

AbstractLow-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.

The Effect of Strain on the Formation of Dislocations at the SiGe/Si Interface

MRS Bulletin ◽  
1996 ◽  
Vol 21 (4) ◽  
pp. 38-44 ◽  
Author(s):  
F.K. LeGoues
Keyword(s):  
Metal Oxide ◽  
High Speed ◽  
High Performance ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Design Rule ◽  
Strained Si

Recently much interest has been devoted to Si-based heteroepitaxy, and in particular, to the SiGe/Si system. This is mostly for economical reasons: Si-based technology is much more advanced, is widely available, and is cheaper than GaAs-based technology. SiGe opens the door to the exciting (and lucrative) area of Si-based high-performance devices, although optical applications are still limited to GaAs-based technology. Strained SiGe layers form the base of heterojunction bipolar transistors (HBTs), which are currently used in commercial high-speed analogue applications. They promise to be low-cost compared to their GaAs counterparts and give comparable performance in the 2-20-GHz regime. More recently we have started to investigate the use of relaxed SiGe layers, which opens the door to a wider range of application and to the use of SiGe in complementary metal oxide semiconductor (CMOS) devices, which comprise strained Si and SiGe layers. Some recent successes include record-breaking low-temperature electron mobility in modulation-doped layers where the mobility was found to be up to 50 times better than standard Si-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Even more recently, SiGe-basedp-type MOSFETS were built with oscillation frequency of up to 50 GHz, which is a new record, in anyp-type material for the same design rule.

Layer-by-Layer Growth of AlAs Buffer Layer for GaAs on Si at Low Temperature by Atomic Layer Epitaxy

1993 ◽  
Vol 32 (Part 2, No. 2B) ◽  
pp. L236-L238 ◽  
Author(s):  
Kuninori Kitahara ◽  
Nobuyuki Ohtsuka ◽  
Toshihiko Ashino ◽  
Masashi Ozeki ◽  
Kazuo Nakajima
Keyword(s):  
Low Temperature ◽  
Buffer Layer ◽  
Atomic Layer ◽  
Layer Growth ◽  
Atomic Layer Epitaxy ◽  
Layer By Layer ◽  
Gaas On Si

Static Performance of SiGe HBTs at Low Temperature

2014 ◽  
Vol 666 ◽  
pp. 59-63
Author(s):  
Maya Lakhdara ◽  
Saϊda Latreche ◽  
Christian Gontrand
Keyword(s):  
Low Temperature ◽  
Heterojunction Bipolar Transistors ◽  
High Performance ◽  
Industrial Process ◽  
Bipolar Transistors ◽  
Fundamental Aspect ◽  
Cryogenic Temperatures ◽  
Sige Hbt ◽  
Static Performance ◽  
The Impact

—This paper analyse is the impact of cryogenic temperatures for SiGe Heterojunction Bipolar Transistors (HBTs) base, realised in BiCMOS9 0.13μm industrial process. The use of these components in microwaves applications exposed to various temperatures is fundamental aspect to predict in precise way its electric characteristics. This paper investigates the temperature dependence from (170 K to 300 K) of DC, for NPN SiGe heterojunction bipolar transistors (HBTs) and notably modeling high performance Si/SiGe HBT for telecommunication and radar detection (>0.5THz) in low temperature (cryogenic temperature).

scholarly journals Comparison of Fabrication Methods of Metal-Organic Framework Optical Thin Films

Nanomaterials ◽  
2018 ◽  
Vol 8 (9) ◽  
pp. 676 ◽  
Author(s):  
Yan Huang ◽  
Cheng-an Tao ◽  
Rui Chen ◽  
Liping Sheng ◽  
Jianfang Wang
Keyword(s):  
Thin Films ◽  
Self Assembly ◽  
Metal Organic Framework ◽  
Dip Coating ◽  
Layer Growth ◽  
Layer By Layer ◽  
Active Components ◽  
Growth Method ◽  
Metal Organic ◽  
University Of Oslo

Homogeneous metal-organic frameworks (MOFs)-based optical thin films have attracted increasing attention, since they can potentially be used as active components in optical/opt-electrical devices, and how to fabricate MOF thin films with high quality is the premise of practically using them. Herein, five fabrication methods of MOF films are systematically investigated and compared from the aspects of appearance, reflectivity, micro-morphology, surface roughness, and optical properties of the films. The famous robust Zr-based MOF, UiO-66 (UiO = University of Oslo) is chosen as a model, and the five methods are spin-coating, dip-coating, self-assembly, direct growth, and the stepwise layer by layer growth method. This study provides fundamental support for the application of MOFs in the optical field.

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