An Assessment of ECR Argon Plasma Etching Damage on Si and SiO2 Interfaces

1992 ◽  
Vol 279 ◽  
Author(s):  
C. W. Nam ◽  
S. Ashok ◽  
W. Tsai ◽  
M. E. Day
Keyword(s):  
Electron Cyclotron Resonance ◽  
Deep Level ◽  
Argon Plasma ◽  
Native Oxide ◽  
Mos Capacitors ◽  
Thermal Oxide ◽  
Oxide Etching ◽  
Order Of Magnitude ◽  
Low Levels ◽  
Transient Spectroscopy

ABSTRACTElectron cyclotron resonance (ECR) argon plasma has been used (to etch the native oxide on Si and thermal SiO2. The Schottky barrier height modification on both n- and p-Si has been studied as a function of substrate bias and etch time. Deep Level Transient Spectroscopy (DLTS) measurements show clear peaks on both p- and n-Si, but wish low levels of trap concentrations (1012-1013cm−3), and decreasing with depth from the surface. The effects of thermal oxide etching on the Si/SiO2 interface have been estimated with MOS capacitors. Negative flat-voltage shift is observed after argon plasma exposure, which removes the thermal oxide at a rate of over 100 Å/min at 50 V bias. C-V measurements show an order of magnitude increase in interface trap density.

Ion Implantation Through Thin Silicon Dioxide Layers for Si-based Solid-State Quantum Computer Device Development

2008 ◽  
Vol 1074 ◽  
Author(s):  
Jeffrey McCallum ◽  
Michael L. Dunn ◽  
Eric Gauja
Keyword(s):  
Solid State ◽  
Ion Implantation ◽  
Quantum Computer ◽  
Deep Level ◽  
Interface Trap ◽  
Mos Capacitors ◽  
Thermal Oxide ◽  
Transient Spectroscopy ◽  
Spectroscopy Studies ◽  
Ion Implanted

ABSTRACTIon implantation doping of Si through an SiO2 overlayer is of interest for fabrication of a range of devices on the pathway to development of a solid–state quantum computer (SSQC). The fabrication requirements of devices based on the Kane architecture typically involve implantation through a pre-existing thin device–quality thermal oxide at low fluences ∼1011 cm−2 and ion energies in the range 10 – 20 keV. Here we present results from a deep level transient spectroscopy studies of ion–implanted MOS capacitors in which interface–trap densities have been measured in as–grown and H–passivated thermal oxides and in ion implanted and rapid–thermally processed devices. For thin oxides of 5nm or less and low ion fluences we find that implantation does not significantly increase interface trap densities and somewhat surprisingly that it can even be beneficial when the interface trap density is abnormally high, (∼ 1 × 1011cm−2.eV−1) in the as-grown oxide.

Improved SiO2/ 4H-SiC Interface Defect Density Using Forming Gas Annealing

2019 ◽  
Vol 963 ◽  
pp. 465-468
Author(s):  
Stephan Wirths ◽  
Giovanni Alfieri ◽  
Alyssa Prasmusinto ◽  
Andrei Mihaila ◽  
Lukas Kranz ◽  
...  
Keyword(s):  
Defect Density ◽  
Deep Level ◽  
Flat Band ◽  
Temperature Dependent ◽  
Mos Capacitors ◽  
Interface Defect ◽  
Before And After ◽  
Oxide Deposition ◽  
Transient Spectroscopy ◽  
Post Deposition

We investigated the influence of forming gas annealing (FGA) before and after oxide deposition on the SiO2/4H-SiC interface defect density (Dit). For MOS capacitors (MOSCAPs) that were processed using FGAs at temperatures above 1050°C, CV characterization revealed decreased flat band voltage shifts and stretch-out for different sweep directions and frequencies. Moreover, constant-capacitance deep level transient spectroscopy (CC-DLTS) was performed and showed Dit levels below 1012 cm-2eV-1 for post deposition FGA at 1200°C. Finally, lateral MOSFETs were fabricated to analyze the temperature-dependent threshold voltage (Vth) shift.

Deep Level Defect Studies in Mocvd-Grown InxGa1−sAs1−yNy Films Lattice-Matched to GaAs

1998 ◽  
Vol 535 ◽  
Author(s):  
Daewon Kwon ◽  
R. J. Kaplar ◽  
J. J. Boeckl ◽  
S. A. Ringel ◽  
A. A. Allerman ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Deep Level ◽  
Energy Levels ◽  
Resolution Limit ◽  
Defect States ◽  
Cross Sectional ◽  
Order Of Magnitude ◽  
Transient Spectroscopy ◽  
Lattice Matched ◽  
Dlts Spectra

AbstractDeep level defects in MOCVD-grown, unintentionally doped p-type InGaAsN films lattice matched to GaAs were investigated using deep level transient spectroscopy (DLTS) measurements. As-grown p-InGaAsN showed broad DLTS spectra suggesting that there exists a broad distribution of defect states within the band-gap. Moreover, the trap densities exceeded 1015 cm−3. Cross sectional transmission electron microscopy (TEM) measurements showed no evidence for threading dislocations within the TEM resolution limit of 107 cm−2. A set of samples was annealed after growth for 1800 seconds at 650 °C to investigate the thermal stability of the traps. The DLTS spectra of the annealed samples simplified considerably, revealing three distinct hole trap levels with energy levels of 0.10 eV, 0.23 eV, and 0.48 eV above the valence band edge with trap concentrations of 3.5 × 1014 cm−3, 3.8 × 1014 cm−3, and 8.2 × 1014 cm−3, respectively. Comparison of as-grown and annealed DLTS spectra showed that post-growth annealing effectively reduced the total trap concentration by an order of magnitude across the bandgap. However, the concentration of a trap with an energy level of 0.48 eV was not affected by annealing indicating a higher thermal stability for this trap as compared with the overall distribution of shallow and deep traps.

Deep Levels in 4H Silicon Carbide Epilayers Induced by Neutron-Irradiation up to 1016 n/cm2

2006 ◽  
Vol 911 ◽  
Author(s):  
Anna Cavallini ◽  
Antonio Castaldini ◽  
Filippo Nava ◽  
Paolo Errani ◽  
Vladimir Cindro
Keyword(s):  
Deep Level ◽  
Collection Efficiency ◽  
Deep Levels ◽  
Charge Collection ◽  
Charge Collection Efficiency ◽  
Temperature Range ◽  
Order Of Magnitude ◽  
Irradiation Level ◽  
Transient Spectroscopy ◽  
Induced Defects

AbstractWe investigated the electronic levels of defects introduced in 4H-SiC α-particle detectors by irradiation with 1 MeV neutrons up to a fluence equal to 8x1015 n/cm2. As well, we investigated their effect on the detector radiation hardness. This study was carried out by deep level transient spectroscopy (DLTS) and photo-induced current transient spectroscopy (PICTS). As the irradiation level approaches fluences in the order of 1015 n/cm2, the material behaves as highly resistive due to a very great compensation effect but the diodes are still able to detect with a acceptably good charge collection efficiency (CCE) equal to 80%. By further increasing fluence, CCE decreases reaching the value of ≈ 20% at fluence of 8x1015 n/cm2.The dominant peaks in the PICTS spectra occur in the temperature range [400, 700] K. Enthalpy, capture cross-section and order of magnitude of the density of such deep levels were calculated. In the above said temperature range the deep levels associated to the radiation induced defects play the key role in the degradation of the CCE. Two deep levels at Et = 1.18 eV and Et = 1.50 eV are likely to be responsible of such dramatic decrease of the charge collection efficiency. These levels were reasonably associated to an elementary defect involving a carbon vacancy and to a defect complex involving a carbon and a silicon vacancy, respectively.

Conductance Transients Study of Slow Traps in Al/SiNx:H/Si and Al/SiNx:H/InP Metal-Insulator-Semiconductor Structures

1997 ◽  
Vol 500 ◽  
Author(s):  
S. Dueñas ◽  
R. Peláez ◽  
E. Castán ◽  
J. Barbolla ◽  
I. Mártil ◽  
...  
Keyword(s):  
Silicon Nitride ◽  
Electron Cyclotron Resonance ◽  
Deep Level ◽  
Perfect Agreement ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor ◽  
Semiconductor Interfaces ◽  
Interfacial Defects ◽  
Transient Spectroscopy ◽  
Resonance Plasma

ABSTRACTWe have obtained Al/SiNx:H/Si and Al/SiNx:H/InP Metal-Insulator-Semiconductor devices by directly depositing silicon nitride thin films on silicon and indium phosphide wafers by the Electron Cyclotron Resonance Plasma method at 200°C. The electrical properties of the structures were first analyzed by Capacitance-Voltage measurements and Deep-Level Transient Spectroscopy (DLTS). Some discrepancies in the absolute value of the interface trap densities were found. Later on, Admittance measurements were carried out and room and low temperature conductance transients in the silicon nitride/semiconductor interfaces were found. The shape of the conductance transients varied with the frequency and temperature at which they were obtained. This behavior, as well as the previously mentioned discrepancies, are explained in terms of a disorder-induced gap-state continuum model for the interfacial defects. A perfect agreement between experiment and theory is obtained proving the validity of the model.

On the Influence of Illumination During Ion Damage Defect Anneal of Silicon

1995 ◽  
Vol 396 ◽  
Author(s):  
A. Tanabe ◽  
S. Ashok
Keyword(s):  
Electron Cyclotron Resonance ◽  
Deep Level ◽  
Hydrogen Plasma ◽  
Minor Role ◽  
Extended Defects ◽  
Rapid Thermal Anneal ◽  
Thermal Generation ◽  
Ion Damage ◽  
Transient Spectroscopy ◽  
A Minor

AbstractAn exploratory deep level transient spectroscopy (DLTS) study on the possible role of illumination during thermal annealing has been carried out on Si with extended defects generated by Ar implantation and electron cyclotron resonance (ECR) hydrogen plasma. Experiments with rapid thermal anneal (RTA) using quartz-halogen lamps show only a minor role for illumination on anneal of defects generated by Ar ion damage as well as thermal generation of defects under post-hydrogenation anneal. However, significant differences are evident relative to conventional furnace anneal and it appears likely that recombination-assisted defect reactions may be quite significant in Si processing when high intensity sources such as arc lamps are adapted in RTA systems.

Process-Induced Defects in High-Purity GaAs

1982 ◽  
Vol 14 ◽  
Author(s):  
P. H. Campbell ◽  
O. Aina ◽  
B. J. Baliga ◽  
R. Ehle
Keyword(s):  
High Temperature ◽  
High Purity ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Deep Levels ◽  
Schottky Contacts ◽  
High Temperature Annealing ◽  
Order Of Magnitude ◽  
Transient Spectroscopy ◽  
Induced Defects

ABSTRACTHigh temperature annealing of Si 3 N4 and SiO2 capped high purity LPE GaAs is shown to result in a reduction in the surface carrier concentration by about an order of magnitude. Au Schottky contacts made on the annealed samples were found to have severely degraded breakdown characteristics. Using deep level transient spectroscopy, deep levels at EC–.58eV, EC–.785eV were detected in the SiO2, capped samples and EC–.62eV, EC–.728eV in the Si3N4 capped Samples while none was detected in the unannealed samples.The electrical degradations are explained in terms of compensation mechanisns and depletion layer recombination-generation currents due to the deep levels.

Charge transient behaviour and spectroscopic ellipsometry characteristics of TiN/HfSiO MOS capacitors

2018 ◽  
Vol 83 (1) ◽  
pp. 10101 ◽  
Author(s):  
Zeeshan Najam Khan ◽  
Ahmed Shuja ◽  
Muhammad Ali ◽  
Shoaib Alam
Keyword(s):  
Energy Efficiency ◽  
Spectroscopic Ellipsometry ◽  
Gate Dielectric ◽  
Deep Level ◽  
Atomic Layer ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Transient Behaviour ◽  
Post Process ◽  
Transient Spectroscopy

A combination of two powerful techniques, namely, charge deep level transient spectroscopy and spectroscopic ellipsometry is employed on atomic layer deposited Si-metal oxide semiconductor capacitors (MOSCAPs) to investigate the energy efficiency of the physical process. Ultra-thin TiN/HfSiO acted as gate-dielectric stack on Si substrate was carefully subjected to rapid thermal processing and subsequent spectroscopic measurements to determine the transient behaviour of charges and electro-optical characteristics. Some key parameters such as trap concentration, activation energy required to surmount the traps, capture cross section, refractive index and extinction coefficient are found to play an important role in order to assess the energy efficiency of the devices both in terms of post-process quality of the retained surface and residual efficiency of the process by virtue of dynamics at atomistic scales. The results may provide a useful insight to the Si manufacturing protocols at ever decreasing nodes with desirable energy efficiency.

Near-interface Traps in n-type SiO2/SiC MOS Capacitors from Energy-resolved CCDLTS

2010 ◽  
Vol 1246 ◽  
Author(s):  
Alberto F Basile ◽  
Sarit Dhar ◽  
John Rozen ◽  
Xudong Chen ◽  
John Williams ◽  
...  
Keyword(s):  
Silicon Dioxide ◽  
Electron Emission ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Emission Rates ◽  
Mos Capacitors ◽  
Transient Spectroscopy

AbstractSilicon Carbide (SiC) Metal-Oxide-Semiconductor (MOS) capacitors, having different nitridation times, were characterized by means of Constant Capacitance Deep Level Transient Spectroscopy (CCDLTS). Electron emission was investigated with respect to the temperature dependence of emission rates and the amplitude of the signal as a function of the filling voltage. The comparison between the emission activation energies of the dominant CCDLTS peaks and the filling voltages, led to the conclusion that the dominant trapping behavior originates in the Silicon-dioxide (SiO2) layer. Moreover, a model of electron capture via tunneling can explain the dependence of the CCDLTS signal on increasing filling voltage.

Sign in / Sign up

Export Citation Format

Share Document