Material and Device Characteristics of MBE Microwave Power FETs with Buffer Layers Grown at Low Temperature (300°C)

1991 ◽  
Vol 241 ◽  
Author(s):  
J. M. Ballingall ◽  
Pin Ho ◽  
R. P. Smith ◽  
S. Wang ◽  
G. Tessmer ◽  
...  
Keyword(s):  
Low Temperature ◽  
Hall Effect ◽  
Buffer Layer ◽  
Active Layer ◽  
Cross Sections ◽  
Microwave Power ◽  
Buffer Layers ◽  
Heat Treated ◽  
Gaas Buffer Layer ◽  
5 Ghz

ABSTRACTMBE GaAs grown at low temperature (300°C) is evaluated for its suitability as a buffer layer for microwave power FETs. Hall effect and capacitance-voltage (C-V) measurements show that low temperature (LT) buffers may have strong deleterious effects on the electronic quality of FET active layers unless they are heat-treated in-situ at 600'C and topped with a thin (∼0. lμm) 600°C GaAs buffer prior to growth of the FET active layer. The voltage isolation properties of the LT buffers are found to be thermally stable to rapid thermal anneals up to 870°C for 10 seconds.Transmission electron microscopy (TEM) cross-sections were examined on FET layers with LT buffer layers which ranged in thickness from 0.1μm to 1.0μm. The TEM reveals a high density (∼1017 cm−3) of small (<100Å) arsenic precipitates in all of the buffer layers studied. In cases where the LT buffer is not heat treated and topped with a thin 600°C GaAs buffer layer, dislocations and arsenic precipitates extend from the buffer layer into the FET active layer. Their presence in the active layer correlates with the degradation in electronic properties observed with Hall effect and CV. Microwave power FETs were measured at DC and 5 GHz. DC and RF results for devices with LT buffer layers are comparable to devices with conventional buffer layers.

Improved MOCVD Growth of GaAs on Si

1987 ◽  
Vol 91 ◽  
Author(s):  
R.M. Lum ◽  
J.K. Klingert ◽  
B.A. Davidson ◽  
M.G. Lamont
Keyword(s):  
Buffer Layer ◽  
Rutherford Backscattering Spectrometry ◽  
Growth Parameters ◽  
Buffer Layers ◽  
Double Crystal ◽  
Gaas On Si ◽  
Mocvd Growth ◽  
Gaas Films ◽  
Gaas Buffer Layer ◽  
Direct Growth

ABSTRACTIn the direct growth of GaAs on Si by MOCVD the overall quality of the heteroepitaxial film is controlled to a large extent by the growth parameters of the initial GaAs buffer layer. We have investigated the structural properties of this layer using Rutherford Backscattering Spectrometry (RBS) and X-ray double crystal diffractometry. The crystallinity of the buffer layer was observed to improve with increasing layer thickness in the range 10–100nm, and then to rapidly degrade for thicker layers. High temperature (750°C) annealing of the buffer layers resulted in considerable reordering of all but the thicker (>200 nm) layers. Alteration of the usual GaAs/Si growth sequence to include an in-situ anneal of the buffer layer after growth interruption yielded GaAs films with improved structural, optical and electrical properties.

Low temperature aqueous solution-processed Li doped ZnO buffer layers for high performance inverted organic solar cells

2016 ◽  
Vol 4 (25) ◽  
pp. 6169-6175 ◽  
Author(s):  
Zhenhua Lin ◽  
Jingjing Chang ◽  
Chunfu Zhang ◽  
Jincheng Zhang ◽  
Jishan Wu ◽  
...  
Keyword(s):  
Aqueous Solution ◽  
Solar Cells ◽  
Low Temperature ◽  
Buffer Layer ◽  
Organic Solar Cells ◽  
High Performance ◽  
Photovoltaic Performance ◽  
Buffer Layers ◽  
Solution Processed ◽  
Doped Zno

An enhanced photovoltaic performance is achieved by employing a lithium doped ZnO layer as the electron buffer layer for organic solar cells.

Anode Buffer Layer of Organic Solar Cells and Recent Developments

2013 ◽  
Vol 711 ◽  
pp. 39-44 ◽  
Author(s):  
Xiao Ran ◽  
Ng Tsz Wai ◽  
Xiu Juan Liang
Keyword(s):  
Solar Cells ◽  
Buffer Layer ◽  
Active Layer ◽  
Organic Solar Cells ◽  
Research Area ◽  
Buffer Layers ◽  
Anode Buffer Layer ◽  
Recent Developments ◽  
Anode Electrode

Stability and efficiency have drawn much attention in research area. Buffer layers are inserted between the anode electrode (typically ITO) and active layer to obtain better performance. In this article development of different categories of materials as anode buffer layer and their possible mechanisms are reviewed.

Effects of the Nitridation Process of (0001) Sapphire on Crystalline Quality of InN Grown by RF-MBE

2004 ◽  
Vol 831 ◽  
Author(s):  
Daisuke Muto ◽  
Ryotaro Yoneda ◽  
Hiroyuki Naoi ◽  
Masahito Kurouchi ◽  
Tsutomu Araki ◽  
...  
Keyword(s):  
Low Temperature ◽  
Buffer Layer ◽  
Buffer Layers ◽  
Crystalline Quality ◽  
Constant Independent ◽  
Nitrogen Flux ◽  
Sapphire Substrates ◽  
Nitridation Process ◽  
Flux Modulation

ABSTRACTThe effects of the nitridation process of (0001) sapphire on crystalline quality of InN were clearly demonstrated. The InN films were grown on NFM (nitrogen flux modulation) HT-InN or LT-InN buffer layers, which had been deposited on nitridated sapphire substrates. We found that low-temperature nitridation of sapphire is effective in improving the tilt distribution of InN films. Whereas the twist distribution remained narrow and almost constant, independent of nitridation conditions, when LT-InN buffer layers were used. The XRC-FWHM value of 54 arcsec for (0002) InN, the lowest reported to date, was achieved by using the LT-InN buffer layer and sapphire nitridation at 300°C for 3 hours.

scholarly journals Growth Of High Quality GaN Thin Films By MBE On Intermediate-temperature Buffer Layers

2000 ◽  
Vol 5 (1) ◽  
Author(s):  
W.K. Fong ◽  
C. F. Zhu ◽  
B. H. Leung ◽  
Charles Surya
Keyword(s):  
Low Temperature ◽  
Buffer Layer ◽  
Electron Mobility ◽  
Unique Feature ◽  
Growth Conditions ◽  
Intermediate Temperature ◽  
Buffer Layers ◽  
Rf Plasma ◽  
Epitaxial Layers ◽  
High Quality

We report the growth of high quality GaN epitaxial layers by rf-plasma MBE. The unique feature of our growth process is that the GaN epitaxial layers are grown on top of a double layer that consists of an intermediate-temperature buffer layer (ITBL), which is grown at 690°C and a conventional low-temperature buffer layer deposited at 500°C. It is observed that the electron mobility increases steadily with the thickness of the ITBL, which peaks at 377 cm2V−1s−1 for an ITBL thickness of 800 nm. The PL also demonstrated systematic improvements with the thickness of the ITBL. Our analyses of the mobility and the photoluminescence characteristics demonstrate that the utilization of an ITBL in addition to the conventional low-temperature buffer layer leads to the relaxation of residual strain within the material resulting in improvement in the optoelectronic properties of the films. A maximum electron mobility of 430 cm2V−1s−1 can be obtained using this technique and further optimizing the growth conditions for the low-temperature buffer layer.

scholarly journals H Out-Diffusion and Device Performance in n-i-p Solar Cells Utilizing High Temperature Hot Wire a-Si:H i-Layers

1998 ◽  
Vol 507 ◽  
Author(s):  
A. H. Mahan ◽  
R. C. Reedy ◽  
E. Iwaniczko ◽  
Q. Wang ◽  
B. P. Nelson ◽  
...  
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Buffer Layer ◽  
Diffusion Coefficients ◽  
Chemical Potential ◽  
Secondary Ion Mass Spectrometry ◽  
Buffer Layers ◽  
Device Performance ◽  
Hot Wire ◽  
Defective Layer

ABSTRACTHydrogen out-diffusion from the n/i interface region plays a major role in controlling the fill factor (FF) and resultant efficiency of n-i-p a-Si:H devices, with the i-layer deposited at high substrate temperatures by the hot wire technique. Modeling calculations show that a thin, highly defective layer at this interface, perhaps caused by significant H out-diffusion and incomplete lattice reconstruction, results in sharply lower device FF's due to the large voltage dropped across this defective layer. One approach to this problem is to introduce trace dopant tailing to ‘compensate’ these defects, but the resultant cells exhibit a poor red response. A second approach involves the addition of buffer layers designed to retard this out-diffusion. We find that an increased H content, either in the n-layer or a thin intrinsic low temperature buffer layer, does not significantly retard this out-diffusion, as observed by secondary ion mass spectrometry (SIMS) H profiles on devices. All these devices have a defect-rich i-layer region near the n/i interface and a poor device efficiency. However, if this low temperature buffer layer is thick enough, the outdiffusion is minimized, yielding nearly flat H profiles and a much improved device performance. We discuss this behavior in the context of the H chemical potentials and H diffusion coefficients in the high temperature, buffer, n-, and stainless steel (SS) substrate layers. The chemical potential differences between the layers control the direction of the H flow and the respective diffusion coefficients, which depend upon many factors such as the local electronic Fermi energy and the extent of the H depletion, determine the rate. Finally, we report a 9.8% initial active area device, fabricated at 16Å/s, using the insights obtained in this study.

Raman study of defects in a GaAs buffer layer grown by low-temperature molecular beam epitaxy

1990 ◽  
Vol 19 (11) ◽  
pp. 1323-1330 ◽  
Author(s):  
R. S. Berg ◽  
Nergis Mavalvala ◽  
Tracie Steinberg ◽  
F. W. Smith
Keyword(s):  
Molecular Beam Epitaxy ◽  
Low Temperature ◽  
Buffer Layer ◽  
Molecular Beam ◽  
Gaas Buffer Layer ◽  
Raman Study

Material Properties of GaAs-on-Si and Fabrication of Digital Integrated Circuits

1988 ◽  
Vol 116 ◽  
Author(s):  
N. Clhand ◽  
F. Ren ◽  
S. N. G. Chu ◽  
A. M. Sergent ◽  
T. Boone ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Buffer Layer ◽  
Cross Sections ◽  
Power Dissipation ◽  
Propagation Delay ◽  
Si Substrate ◽  
Digital Integrated Circuits ◽  
Lower Growth ◽  
Gaas On Si ◽  
Gaas Buffer Layer

AbstractWe have found that the surface morphology of GaAs grown on Si by MBE is smoother at lower growth temperatures (<500° C), but that the crystalline properties improve at higher growth temperatures (575-600°C). After thermal annealing at 850°C for 15 rai the TEM plan-views indicate that the dislocation density on the surface is reduced by a factor of 4 only. However, the TEM cross-sections indicate a much larger reduction of dislocations in highly dislocated regions near the GaAs/Si interface. Dislocations which are loops or tangles tend to shrink and clean up after annealing leaving a larger volume of GaAs free from, or with fewer, dislocations. The density of electron deep levels reduces with increasing thickness. Electron traps M1, M3 and M4 are not seen when a high purity As is used. For high device performance, the GaAs buffer layer thickness should be at least 2 µm. Although the wafer warpage increases from 7 µm to 52 µm as the GaAs thickness increases from 1.2 µm to 4.2 µm on 7.5 cm wafers, the wafers are as fiat as the original Si wafers under vacuum clamping. Wafer warpage reduced significantly when GaAs was grown selectively through a Si shadow mask. For 1 µm gate MESFET's, σvT was 65 mV on a 3.5 × 3 cm2 wafer area with gmax = 153 mS/ram. A minimum propagation delay of 52 ps/stage at a power dissipation of 1.3 mW/gate was measured for the 19 stage DCFL ring oscillators with 40= yield. Conductivity of the Si substrate and GaAs buffer layer posed no problem in channel isolation. The divide-by-two circuits performed the frequency dividing operation up to 1.8 GHz. The study shows that GaAs-on-Si has a great potential for digital IC's.

Correlation Between the AlN Buffer Layer Thickness and the GaN Polarity in GaN/AlN/Si(111) Grown by MBE

2002 ◽  
Vol 743 ◽  
Author(s):  
A. M. Sanchez ◽  
P. Ruterana ◽  
P. Vennegues ◽  
F. Semond ◽  
F. J. Pacheco ◽  
...  
Keyword(s):  
Low Temperature ◽  
Buffer Layer ◽  
Layer Thickness ◽  
Buffer Layers ◽  
Nucleation Layer ◽  
Buffer Layer Thickness ◽  
Aln Buffer

ABSTRACTIn this work it is shown that thin AlN buffer layers cause N-polarity GaN epilayers, with a high inversion domains density. When the AlN thickness increases, the polarity of the epilayer changes to Ga. The use of a low temperature AlN nucleation layer leads to a flat AlN/Si(111) interface. This contributes to decrease the inversion domains density in the overgrown GaN epilayer with a Ga polarity.

Sign in / Sign up

Export Citation Format

Share Document