Materials Challenges for CdTe and CuInSe2 Photovoltaics

MRS Bulletin ◽  
2007 ◽  
Vol 32 (3) ◽  
pp. 225-229 ◽  
Author(s):  
Joseph D. Beach ◽  
Brian E. McCandless

AbstractThe record laboratory cell (∼1 cm2 area) efficiency for thin-film cadmium telluride (CdTe) is 16.5%, and that for a copper indium diselenide (CuInSe2) thin-film alloy is 19.5%. Commercially produced CdTe and CuInSe2 modules (0.5–1 m2 area) have efficiencies in the 7–11% range. Research is needed both to increase laboratory cell efficiencies and to bring those small - area efficiencies to large-area production. Increases in laboratory CdTe cell efficiency will require increasing open-circuit voltage, which will allow cells to harvest more energy from each absorbed photon. This will require extending the minority carrier lifetime from its present τ ≤ 2 ns to τ ≥ 10 ns and increasing hole concentration in the CdTe beyond 1015 cm2, which appears to be limited by compensating defects. Increasing laboratory CuInSe2-based cell efficiency significantly beyond 19.5% will also require increasing the open-circuit voltage, either by increasing the bandgap, the doping level, or the minority carrier lifetime. The photovoltaic cells in commercial modules occupy tens of square centimeters, and both models and experiments have shown that low-performing regions in small fractions of a cell can significantly reduce the overall cell per formance. Increases in commercial module efficiency will require control of materials properties across large deposition areas in a high-throughput environment to minimize such non-uniformities. This article discusses approaches used and research needed to increase the ultimate efficiencies of CdTe- and CuInSe2-based devices and translate these gains to commercial photovoltaic modules.

2004 ◽  
Vol 1 (2) ◽  
pp. 321-325
Author(s):  
Baghdad Science Journal

The measurement of minority carrier lifetime (MCLT) ofp-n Si fabricated with aid of laser doping technique was reported. The measurement is achieved by using open circuit voltage decay (OCVD) technique. The experiment data confirms that the value of MCLT and proftle of Voc decay were very sensitive to the doping laser energy.


2013 ◽  
Vol 3 (4) ◽  
pp. 1319-1324 ◽  
Author(s):  
Darius Kuciauskas ◽  
Ana Kanevce ◽  
James M. Burst ◽  
Joel N. Duenow ◽  
Ramesh Dhere ◽  
...  

2015 ◽  
Vol 242 ◽  
pp. 126-132 ◽  
Author(s):  
George Martins ◽  
Ruy S. Bonilla ◽  
Toby Burton ◽  
P. MacDonald ◽  
Peter R. Wilshaw

In this work we use Saw Damage Gettering (SDG) in combination with emitter formation to improve the minority carrier lifetime of highly contaminated multi-crystalline silicon wafers. This process is applied to wafers from the bottom of ingots, commonly referred to as the “red zone”, which are currently discarded since their high concentration of impurities limits the efficiency of solar cells produced therefrom. SDG is a potentially simple technique designed to upgrade these wafers. In this technique, bulk impurities are dissolved via annealing. The wafers are then cooled which generates a super-saturation of impurities in solution. The system then relaxes through the formation of precipitates in the saw damaged region. SDG is shown to be enhanced when using a temperature dependent cooling rate which maximizes the flux of impurities to the saw damaged regions. In addition, these benefits were observed even after an additional gettering process occurring during an emitter formation procedure. The SDG annealing conditions required to achieve the maximum lifetime were altered by the introduction of the emitter formation process. The enhancement generated by the SDG process may be sufficient to enable red-zone wafers to be processed is the same manner as higher quality no-red zone wafer wafers without adversely affecting the resultant cell efficiency. Due to its simplicity, it is expected that SDG can easily be incorporated into current production methods.


2015 ◽  
Vol 2015 ◽  
pp. 1-5
Author(s):  
Haoyang Cui ◽  
Jialin Wang ◽  
Chaoqun Wang ◽  
Can Liu ◽  
Kaiyun Pi ◽  
...  

This paper presents experiment measurements of minority carrier lifetime using three different methods including modified open-circuit voltage decay (PIOCVD) method, small parallel resistance (SPR) method, and pulse recovery technique (PRT) onpnjunction photodiode of the HgCdTe photodetector array. The measurements are done at the temperature of operation near 77 K. A saturation constant background light and a small resistance paralleled with the photodiode are used to minimize the influence of the effect of junction capacitance and resistance on the minority carrier lifetime extraction in the PIOCVD and SPR measurements, respectively. The minority carrier lifetime obtained using the two methods is distributed from 18 to 407 ns and from 0.7 to 110 ns for the different Cd compositions. The minority carrier lifetime extracted from the traditional PRT measurement is found in the range of 4 to 20 ns forx=0.231–0.4186. From the results, it can be concluded that the minority carrier lifetime becomes longer with the increase of Cd composition and the pixels dimensional area.


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