Nanotopography Issues in Shallow Trench Isolation CMP

MRS Bulletin ◽  
2002 ◽  
Vol 27 (10) ◽  
pp. 761-765 ◽  
Author(s):  
Duane Boning ◽  
Brian Lee
Keyword(s):  
Integrated Circuits ◽  
Chemical Mechanical Planarization ◽  
Surface Films ◽  
Small Surface ◽  
Shallow Trench Isolation ◽  
Important Concern ◽  
Trench Isolation ◽  
Time Required ◽  
Nitride Layers ◽  
Cmp Model

AbstractAs advancing technologies increase the demand for planarity in integrated circuits, nanotopography has emerged as an important concern in shallow trench isolation (STI) on wafers polished by means of chemical–mechanical planarization (CMP). Previous work has shown that nanotopography—small surface-height variations of 10–100 nm in amplitude extending across millimeter-scale lateral distances on virgin wafers—can result in CMP-induced localized thinning of surface films such as the oxides or nitrides used in STI. A contact-wear CMP model can be employed to produce maps of regions on a given starting wafer that are prone to particular STI failures, such as the lack of complete clearing of the oxide in low spots and excessive erosion of nitride layers in high spots on the wafer. Stiffer CMP pads result in increased nitride thinning. A chip-scale pattern-dependent CMP simulation shows that substantial additional dishing and erosion occur because of the overpolishing time required due to nanotopography. Projections indicate that nanotopography height specifications will likely need to decrease in order to scale with smaller feature sizes in future IC technologies.

Modeling and Mapping of Nanotopography Interactions with CMP

2002 ◽  
Vol 732 ◽  
Author(s):  
Brian Lee ◽  
Duane S. Boning ◽  
Winthrop Baylies ◽  
Noel Poduje ◽  
John Valley
Keyword(s):  
Oxide Thickness ◽  
Wafer Surface ◽  
Surface Films ◽  
Small Surface ◽  
Shallow Trench Isolation ◽  
Important Concern ◽  
Trench Isolation ◽  
Aggregate Effect ◽  
Map Data ◽  
Insight Into

AbstractAs the demand for planarity increases with advanced IC technologies, nanotopography has arisen as an important concern in shallow trench isolation (STI) chemical mechanical polishing (CMP) processes. Previous work has shown that nanotopography, or small surface height variations on raw wafers 20 to 50 nm in amplitude extending across millimeter scale lateral distances, can result in substantial CMP-induced localized thinning of surface films such as oxides or nitrides used in STI [1]. This interaction with CMP depends both on characteristics of the wafer such as heights and spatial wavelengths of the nanotopography, and characteristics of the CMP process including the planarization length or pad stiffness.In this paper we review and extend the previous work on modeling of nanotopography. Three approaches to predicting the post-CMP oxide thinning due to nanotopography are compared. The first approach is the simplest, where a statistical aggregate effect is computed. Following the work of Schmolke [2], a transfer coefficient α is found which captures the portion of the nanotopography that is correlated with the final oxide thinning. The second approach is the most detailed, depending on explicit numerical simulation of pad elastic properties. In this case, a contact wear simulation is used to produce a detailed map of oxide thickness corresponding to any given pre-measured nanotopography wafer surface. The third approach is a signal processing method, sitting somewhere between the previous two extremes in terms of approximation and complexity. In this last case, a two-dimensional transfer function is extracted which captures the spatial smoothing accomplished by CMP. This filter can then be applied efficiently to premeasured nanotopography maps for other wafers to predict the final oxide thicknesses.We also propose a predictive mapping of post-CMP oxide or nitride thicknesses to provide insight into the relative goodness of a wafer measured for nanotopography which is to be subjected to a CMP process. Specifically, we suggest that for post-CMP impact, maps and computation of areas having insufficient oxide clearing, or having final nitride thickness outside of required ranges, are useful and practical. Such device failure potential maps complement the fundamental nanotopography height map data and metrics based directly on that data, and enable evaluation, comparison, and development of improved wafers and STI CMP processes.

Advances in Chemical-Mechanical Planarization

MRS Bulletin ◽  
2002 ◽  
Vol 27 (10) ◽  
pp. 743-751 ◽  
Author(s):  
Rajiv K. Singh ◽  
Rajeev Bajaj
Keyword(s):  
Surface Topography ◽  
Process Integration ◽  
Semiconductor Industry ◽  
Chemical Mechanical Planarization ◽  
Shallow Trench Isolation ◽  
Trench Isolation ◽  
Fundamental Understanding ◽  
Copper Polishing ◽  
Future Growth

AbstractThe primary aim of this issue of MRS Bulletin is to present an overview of the materials issues in chemical–mechanical planarization (CMP), also known as chemical–mechanial polishing, a process that is used in the semiconductor industry to isolate and connect individual transistors on a chip. The CMP process has been the fastest-growing semiconductor operation in the last decade, and its future growth is being fueled by the introduction of copper-based interconnects in advanced microprocessors and other devices. Articles in this issue range from providing a fundamental understanding of the CMP process to the latest advancements in the field. Topics covered in these articles include an overview of CMP, fundamental principles of slurry design, understanding wafer–pad–slurry interactions, process integration issues, the formulation of abrasive-free slurries for copper polishing, understanding surface topography issues in shallow trench isolation, and emerging applications.

Shallow Trench Isolation Chemical Mechanical Planarization: A Review

2015 ◽  
Vol 4 (11) ◽  
pp. P5029-P5039 ◽  
Author(s):  
Ramanathan Srinivasan ◽  
Pradeep VR Dandu ◽  
S. V. Babu
Keyword(s):  
Chemical Mechanical Planarization ◽  
Shallow Trench Isolation ◽  
Trench Isolation

scholarly journals A Study on the Pattern Effects of Chemical Mechanical Planarization with CNN-Based Models

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1158
Author(s):  
Han Bao ◽  
Lan Chen ◽  
Bowen Ren
Keyword(s):  
Neural Network ◽  
Integrated Circuits ◽  
Surface Morphology ◽  
Chemical Mechanical Polishing ◽  
Chemical Mechanical Planarization ◽  
Important Process ◽  
Chip Surface ◽  
Atomic Force ◽  
Test Chips ◽  
Cmp Model

Chemical mechanical polishing (CMP) has become one of the most important process stages in the fabrication of advanced integrated circuits (IC). The CMP pattern effect strongly influences the planarization of the chip surface morphology after CMP, degrading the performance and the yield of the circuits. In this paper, we introduce a method to predict the post-CMP surface morphology with a convolutional neural network (CNN)-based CMP model. Then, CNN-based, density step height (DSH)-based, and common neural-network-based CMP models are built to compare the accuracy of the predictions. The test chips are designed and taped out and the predictions of the three models are compared with experimental results measured by an atomic force profiler (AFP) and scanning electron microscope (SEM). The results show that CNN-based CMP models have better accuracy by taking advantage of the CNN networks to extract features from images instead of the traditional equivalent pattern parameters. The effective planarization length (EPL) is introduced and defined to make better predictions with real-time CMP models and in dummy filling tasks. Experiments are designed to show a method to solve the EPL.

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