scholarly journals Large Area Laser Conditioning of Dielectric Thin Film Mirrors

2009 ◽  
pp. 376-376-17
Author(s):  
MR Kozlowski ◽  
CR Wolfe ◽  
MC Staggs ◽  
JH Campbell
2009 ◽  
Vol 1196 ◽  
Author(s):  
Takehito Kodzasa ◽  
Sei Uemura ◽  
Kouji Suemori ◽  
Manabu Yoshida ◽  
Satoshi Hoshino ◽  
...  

AbstractIt is mostly important to develop the fabrication technology of the dielectric thin film with high insulation performance and surface flatness by large-area printing process. We have developed a technique to fabricate a silicon dioxide (SiO2) dielectric thin film by the low temperature solution process. The thin film prepared by about 170°C showed excellent dielectric performance with high resistivity in the order of 10 to the 16 Ωcm and surface flatness with the same degree of thermal oxidized SiO2 thin film on the silicon wafer (RMS=0.15nm). In addition, it is showed that the production of thick film of SiO2 with high dielectric performance and surface flatness is possible by applying over-coating technique. These indicate that this SiO2 production technique is greatly useful for the large-area printed electronics technology.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  

AbstractPower devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (> 1000 °C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer, thereby preventing their applications to compact devices, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (< 1 × 10–4 Ω cm2) and high breakdown voltage VBD (~ 100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.


2021 ◽  
Vol 17 ◽  
pp. 100352
Author(s):  
S.-J. Wang ◽  
M. Sawatzki ◽  
H. Kleemann ◽  
I. Lashkov ◽  
D. Wolf ◽  
...  

2015 ◽  
Vol 135 ◽  
pp. 35-42 ◽  
Author(s):  
A. Gerber ◽  
V. Huhn ◽  
T.M.H. Tran ◽  
M. Siegloch ◽  
Y. Augarten ◽  
...  

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