scholarly journals Instant single-pixel imaging: on-chip real-time implementation based on the instant ghost imaging algorithm

OSA Continuum ◽  
2020 ◽  
Vol 3 (3) ◽  
pp. 629
Author(s):  
Zhe Yang ◽  
Jun Liu ◽  
Wei-Xing Zhang ◽  
Dong Ruan ◽  
Jun-Lin Li
2021 ◽  
Author(s):  
Hongyu Zhang ◽  
Lijun Xu ◽  
Heng Xie ◽  
Zhang Cao
Keyword(s):  
On Chip ◽  

2020 ◽  
Vol 28 (3) ◽  
pp. 3607 ◽  
Author(s):  
Zhe Yang ◽  
Wei-Xing Zhang ◽  
Yi-Pu Liu ◽  
Dong Ruan ◽  
Jun-Lin Li

2001 ◽  
Vol 7 (S2) ◽  
pp. 1050-1051 ◽  
Author(s):  
S.W. Nam ◽  
D.A. Wollman ◽  
Dale E. Newbury ◽  
G.C. Hilton ◽  
K.D. Irwin ◽  
...  

The high performance of single-pixel microcalorimeter EDS (μ,cal EDS) has been shown to be very useful for a variety of microanalysis cases. The primary advantage of jxcal EDS over conventional EDS is the factor of 25 improvement in energy resolution (∽3 eV in real-time). This level of energy resolution is particularly important for applications such as nanoscale contaminant analysis where it is necessary to resolve peak overlaps at low x-ray energies. Because μcal EDS offers practical solutions to many microanalysis problems, several companies are proceeding with commercialization of single-pixel μal EDS technology. Two drawbacks limiting the application of uxal EDS are its low count rate (∽500 s−1) and small area (∽0.04 mm for a bare single pixel, ∽5 mm2 with a polycapillary optic). We are developing a 32x32 pixel array with a total area of 40 mm2 and with a total count rate between 105 s−1 and 106 s−1.


Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 689
Author(s):  
Tom Springer ◽  
Elia Eiroa-Lledo ◽  
Elizabeth Stevens ◽  
Erik Linstead

As machine learning becomes ubiquitous, the need to deploy models on real-time, embedded systems will become increasingly critical. This is especially true for deep learning solutions, whose large models pose interesting challenges for target architectures at the “edge” that are resource-constrained. The realization of machine learning, and deep learning, is being driven by the availability of specialized hardware, such as system-on-chip solutions, which provide some alleviation of constraints. Equally important, however, are the operating systems that run on this hardware, and specifically the ability to leverage commercial real-time operating systems which, unlike general purpose operating systems such as Linux, can provide the low-latency, deterministic execution required for embedded, and potentially safety-critical, applications at the edge. Despite this, studies considering the integration of real-time operating systems, specialized hardware, and machine learning/deep learning algorithms remain limited. In particular, better mechanisms for real-time scheduling in the context of machine learning applications will prove to be critical as these technologies move to the edge. In order to address some of these challenges, we present a resource management framework designed to provide a dynamic on-device approach to the allocation and scheduling of limited resources in a real-time processing environment. These types of mechanisms are necessary to support the deterministic behavior required by the control components contained in the edge nodes. To validate the effectiveness of our approach, we applied rigorous schedulability analysis to a large set of randomly generated simulated task sets and then verified the most time critical applications, such as the control tasks which maintained low-latency deterministic behavior even during off-nominal conditions. The practicality of our scheduling framework was demonstrated by integrating it into a commercial real-time operating system (VxWorks) then running a typical deep learning image processing application to perform simple object detection. The results indicate that our proposed resource management framework can be leveraged to facilitate integration of machine learning algorithms with real-time operating systems and embedded platforms, including widely-used, industry-standard real-time operating systems.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 25
Author(s):  
Shijie Deng ◽  
Alan P. Morrison ◽  
Yong Guo ◽  
Chuanxin Teng ◽  
Ming Chen ◽  
...  

The design and implementation of a real-time breakdown voltage and on-chip temperature monitoring system for single photon avalanche diodes (SPADs) is described in this work. In the system, an on-chip shaded (active area of the detector covered by a metal layer) SPAD is used to provide a dark count rate for the breakdown voltage and temperature calculation. A bias circuit was designed to provide a bias voltage scanning for the shaded SPAD. A microcontroller records the pulses from the anode of the shaded SPAD and calculates its real-time dark count rate. An algorithm was developed for the microcontroller to calculate the SPAD’s breakdown voltage and the on-chip temperature in real time. Experimental results show that the system is capable of measuring the SPAD’s breakdown voltage with a mismatch of less than 1.2%. Results also show that the system can provide real-time on-chip temperature monitoring for the range of −10 to 50 °C with errors of less than 1.7 °C. The system proposed can be used for the real-time SPAD’s breakdown voltage and temperature estimation for dual-SPADs or SPAD arrays chip where identical detectors are fabricated on the same chip and one or more dummy SPADs are shaded. With the breakdown voltage and the on-chip temperature monitoring, intelligent control logic can be developed to optimize the performance of the SPAD-based photon counting system by adjusting the parameters such as excess bias voltage and dead-time. This is particularly useful for SPAD photon counting systems used in complex working environments such as the applications in 3D LIDAR imaging for geodesy, geology, geomorphology, forestry, atmospheric physics and autonomous vehicles.


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