Efficient BER estimation for simulation of coherent transmission systems including digital signal processing and forward-error-correction

2014 ◽  
Author(s):  
Hadrien Louchet ◽  
André Richter
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Error Correction ◽  
Forward Error Correction ◽  
Digital Signal ◽  
Transmission Systems ◽  
Forward Error ◽  
Coherent Transmission

scholarly journals Digital signal processing approaches for semiconductor phase noise tolerant coherent transmission systems

2015 ◽  
Author(s):  
Miguel Iglesias Olmedo ◽  
Xiaodan Pang ◽  
Richard Schatz ◽  
Darko Zibar ◽  
Idelfonso Tafur Monroy ◽  
...  
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Phase Noise ◽  
Digital Signal ◽  
Transmission Systems ◽  
Noise Tolerant ◽  
Coherent Transmission

scholarly journals A Generic Reconfigurable Mixed Time and Frequency Domain QAM Transmitter with Forward Error Correction

2017 ◽  
Vol 6 (2) ◽  
pp. 80 ◽  
Author(s):  
Shalina Percy Delicia Figuli ◽  
Peter Figuli ◽  
Alberto Sonnino ◽  
Juergen Becker
Keyword(s):  
Error Correction ◽  
Frequency Domain ◽  
Communication Systems ◽  
High Speed ◽  
Forward Error Correction ◽  
Digital Signal ◽  
Field Programmable ◽  
Hard Limit ◽  
Programmable Gate Arrays ◽  
Forward Error

In the past three decades, Field Programmable Gate Arrays (FPGAs) have emerged to be the backbone of digital signal processing, especially in high-speed communication systems. However, today, these devices are clocked below 1GHz and improvement in performance stays a big challenge on all abstraction layers, right from system architecture down to physical technology. Far and wide, myriad number of researches are done on methodologies and techniques which can deliver higher throughput with lower operating frequencies. Towards this projected objective, in this paper an efficient modulation technique like Quadrature Amplitude Modulation (QAM) along with mixed time and frequency domain approach and Forward Error Correction (FEC) technique have been utilized to employ a generic scalable FPGA based QAM transmitter with filter parallelization being executed in mixed domain. The system developed in this paper achieves an effective throughput of 12.8Gb/s for 256-QAM with 16 parallel inputs having an operating frequency of 201.25MHz, while a 18.7Gb/s effective throughput is realized with 32 parallel inputs at 146MHz. Thereby, it paves down a promising methodology for applications where having higher clock frequencies is a hard limit.

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