scholarly journals Optimizing Stochastic Temporal Manufacturing Processes with Inventories: An E fficient Heuristic Algorithm Based on Deterministic Approximations

2015 ◽  
pp. 30-46 ◽  
Author(s):  
Mohan Krishnamoorthy ◽  
Alexander Brodsky ◽  
Daniel A. Menascé
Keyword(s):  
Heuristic Algorithm ◽  
Manufacturing Processes

Impact of fiber structure on edge-wicking of highly-sized paperboard

TAPPI Journal ◽  
2018 ◽  
Vol 17 (08) ◽  
pp. 437-443
Author(s):  
Lebo Xu ◽  
Jeremy Meyers ◽  
Peter Hart
Keyword(s):  
Fiber Surface ◽  
Manufacturing Processes ◽  
Paper Machine ◽  
Liquid Penetration ◽  
Fiber Structure ◽  
Cut Edge ◽  
Local Fiber

Coffee edge-wicking testing was conducted on two groups of highly-sized paperboard manufactured at two mills with similar manufacturing processes, but with vastly different local fiber sources. Although the Hercules size test (HST) indicated similar internal size levels between the two types of board, the edge-wicking behavior was noticeably different. Analysis of fiber structure revealed that the board with more edge-wicking had fibers with thicker fiber walls, which kept the fiber lumen more open after pressing and drying on a paper machine. It was demonstrated that liquid penetration through voids between fibers in highly-sized paperboard was limited, because the fiber surface was well protected by the presence of sufficient sizing agent. Nevertheless, freshly exposed fiber walls and lumens at the cut edge of the sheet were not protected by sizing material, which facilitated edge-wicking. The correlation between fiber structure and edge-wicking behavior was highlighted in this work to inspire development of novel sizing strategies that protect the freshly cut edge of the sheet from edge-wicking.

A Heuristic Algorithm for Reconstructing a Packet Filter with Dependent Rules

2013 ◽  
Vol E96.B (1) ◽  
pp. 155-162 ◽  
Author(s):  
Ken TANAKA ◽  
Kenji MIKAWA ◽  
Manabu HIKIN
Keyword(s):  
Heuristic Algorithm ◽  
Packet Filter

An Overview of 300 mm SOI Starting Wafer Quality and Its Yield Detractors

2005 ◽  
Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Device Fabrication ◽  
Sampling Plan ◽  
Silicon On Insulator ◽  
Manufacturing Processes ◽  
Circuit Performance ◽  
Characterization Techniques ◽  
Wafer Manufacturing

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.

Towards High Accuracy Fault Diagnosis of Digital Circuits

2004 ◽  
Author(s):  
Camelia Hora ◽  
Stefan Eichenberger
Keyword(s):  
Fault Diagnosis ◽  
Fault Location ◽  
Digital Circuits ◽  
High Accuracy ◽  
Manufacturing Processes ◽  
Diagnosis Method ◽  
Technology Trend

Abstract Due to the development of smaller and denser manufacturing processes most of the hardware localization techniques cannot keep up satisfactorily with the technology trend. There is an increased need in precise and accurate software based diagnosis tools to help identify the fault location. This paper describes the software based fault diagnosis method used within Philips, focusing on the features developed to increase its accuracy.

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