A Method for Measuring Bubble Diameter Distribution in Gas-Liquid Agitated Vessel under High Gas Hold-Up Using Real-Time High-Speed Image Processing System.

1998 ◽  
Vol 31 (3) ◽  
pp. 366-373 ◽  
Author(s):  
Mitsuo Kamiwano ◽  
Meguru Kaminoyama ◽  
Kazihiko Nishi ◽  
Daigo Shirota
2014 ◽  
Vol 971-973 ◽  
pp. 1454-1458
Author(s):  
Lei Qu ◽  
Yan Tian ◽  
Jun Liu

For real time target detection, identification and tracking in high frame rates, large field of view images, a real-time image processing system is designed. A TMS320C6678 DSP runs as the chief arithmetic processor of this system and FPGA as the secondary controller. C6678 is compared with the same series C6414 in image compression algorithm test. Experimental results show that the new system has a more effective construct, and higher reliability, and can provide a platform for the new high-speed image processing.


2003 ◽  
Author(s):  
Kohtaro Ohba ◽  
Jesus C. P. Ortega ◽  
Tamio Tanikawa ◽  
Kazuo Tanie ◽  
Kenji Tajima ◽  
...  

1987 ◽  
Vol 134 (1) ◽  
pp. 39 ◽  
Author(s):  
A.C. Elphinstone ◽  
A.P. Heron ◽  
G.S. Hobson ◽  
A. Houghton ◽  
M.K. Lau ◽  
...  

2012 ◽  
Vol 443-444 ◽  
pp. 71-76
Author(s):  
Lei Chen ◽  
Xiao Yan Tian ◽  
Jiao Pang

High speed image processing has a dilemma of that software-based approach lock real-time property while hardware-based approach has high modeling complexity. In order to solve above problem, this paper adopted the technical solution of Modelsim co-simulation with foreign language interface (FLI). Co-simulation technology, combining with rail sections image processing system as simulation platform, comprehensive using C language’s high flexibility in data processing , Modelsim’s high reliability in simulate FPGA, and take use of dynamic partially allocation methods, heavy effectively reduced the complexity of image processing system and storage space. Practice proves, this means provide a reliable basis for scheme verification of FPGA image processing system.


2013 ◽  
Vol 401-403 ◽  
pp. 1507-1513 ◽  
Author(s):  
Zhong Hu Yuan ◽  
Wen Tao Liu ◽  
Xiao Wei Han

In the weld image acquisition system, real-time image processing has been a difficult design bottleneck to break through, especially for the occasion of large data processing capability and more demanding real-time requirements, in which the traditional MCU can not adapt, so using high-performance FPGA as the core of the high speed image acquisition and processing card, better meets the large amount of data in most of the image processing system and high demanding real-time requirements. At the same time, system data collection, storage and display were implemented by using Verilog, and in order to reducing the influence of edge detection noise, the combination of image enhancement and median filtering image preprocessing algorithm was used. Compared to the pre-processing algorithm of the software implementation, it has a great speed advantage, and simplifies the subsequent processing work load, improves the speed and efficiency of the entire image processing system greatly. So it proves that the system has strong ability of restraining the noise of image, and more accurate extracted edge positioning, it can be applied in the seam tracking field which need higher real-time requirements.


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