Two Dimensional Analytical Potential Modeling of Nanoscale Fully Depleted Metal Gate Double Gate MOSFET

2008 ◽  
Vol 3 (3) ◽  
pp. 297-306 ◽  
Author(s):  
S. K. Vishvakarma ◽  
A. K. Saxena ◽  
S. Dasgupta
Keyword(s):  
Double Gate ◽  
Two Dimensional ◽  
Metal Gate ◽  
Fully Depleted ◽  
Analytical Potential ◽  
Double Gate Mosfet

Two-dimensional analytical models for asymmetric fully depleted double-gate strained silicon MOSFETs

2011 ◽  
Vol 20 (1) ◽  
pp. 017301 ◽  
Author(s):  
Hong-Xia Liu ◽  
Jin Li ◽  
Bin Li ◽  
Lei Cao ◽  
Bo Yuan
Keyword(s):  
Analytical Models ◽  
Strained Silicon ◽  
Double Gate ◽  
Two Dimensional ◽  
Fully Depleted

Two Dimensional Numerical Modeling of Lightly Doped Nanoscale Double-Gate MOSFET

2005 ◽  
Vol 2 (3) ◽  
pp. 414-422
Author(s):  
Deepanjan Datta ◽  
A. Annada Prasad Sarab ◽  
S. Dasgupta
Keyword(s):  
Numerical Modeling ◽  
Double Gate ◽  
Two Dimensional ◽  
Double Gate Mosfet

Two Dimensional Analytical Potential Modeling of Nanoscale Symmetric Double Gate (SDG) MOSFET with Ultra Thin Body (UTB)

2007 ◽  
Vol 4 (6) ◽  
pp. 1144-1148 ◽  
Author(s):  
Santosh Kumar Vishvakarma ◽  
Vinit Agrawal ◽  
Balwinder Raj ◽  
S. Dasgupta ◽  
A. K. Saxena
Keyword(s):  
Thin Body ◽  
Double Gate ◽  
Two Dimensional ◽  
Analytical Potential

Integration Challenges for Double-Gate MOSFET Technologies

2001 ◽  
Vol 686 ◽  
Author(s):  
W.P. Maszara
Keyword(s):  
Cross Section ◽  
Wafer Bonding ◽  
Process Integration ◽  
Device Modeling ◽  
Gate Length ◽  
Double Gate ◽  
Fully Depleted ◽  
Lateral Tunnel ◽  
Double Gate Mosfet ◽  
Modeling Data

AbstractDevice modeling data and some early experiments suggests that fully depleted MOSFET devices where channel is controlled by two opposing gates or one gate that surrounds most or the entire channel, will provide better scaling than the classic devices with one gate on one side of the channel. However, formation of such devices requires complex, non-conventional and sometimes exotic geometry and processing, ranging from wafer bonding to selective lateral ‘tunnel’ epitaxy, to selectively wet-etched channels with triangular cross-section. Classic single-gate transistors have been recently demonstrated with reasonable performance at 20-15 nm of physical gate length. Double-gate transistors with their process integration complexity will likely become a viable alternative for smaller geometries. This paper will discuss various approaches to realization of those multi-gate fully depleted devices and their process integration challenges for sub-15 nm gates.

Two-dimensional numerical modeling of lightly doped nano-scale double-gate MOSFET

2006 ◽  
Vol 37 (6) ◽  
pp. 537-545 ◽  
Author(s):  
Deepanjan Datta ◽  
A. Ananda Prasad Sarab ◽  
S. Dasgupta
Keyword(s):  
Numerical Modeling ◽  
Double Gate ◽  
Two Dimensional ◽  
Nano Scale ◽  
Double Gate Mosfet
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