scholarly journals A Wide-Band High-Resolution Transmitter for Optical Isolation Amplifier

2020 ◽  
Vol 2020 ◽  
pp. 1-8
Author(s):  
Chengying Chen ◽  
Lixia Bai ◽  
Yunrong Zhu ◽  
Tiancheng Wu
Keyword(s):  
High Resolution ◽  
Power Supply ◽  
Supply Voltage ◽  
Wide Band ◽  
Driving Ability ◽  
Common Mode ◽  
Sigma Delta Modulator ◽  
Common Mode Voltage ◽  
Optical Isolation ◽  
Isolation Amplifier

A wide-band and high-resolution transmitter of optical isolation amplifier is proposed for switching power supply isolation and servo motor drive applications. The transmitter is based on the chopper-stabilized technique and sigma delta modulator. A built-in common-mode voltage circuit of switched capacitor is proposed to ensure the stability of input DC common mode. Meanwhile, the feedback capacitor is used to improve the driving ability, which helps to avoid a buffer with large input swing. The circuit is tapeout with GF CMOS 0.18 μm 1P6M process with 5 V power supply. The test results show that in 5 V supply voltage, the input swing of transmitter is 2 V and the effective signal bandwidth is 110 kHz. And the output resolution achieves 11 bit.

Area-Efficient Capacitor-Splitting Switching Scheme with a Nearly Constant Common-Mode Voltage for SAR ADCs

2019 ◽  
Vol 29 (10) ◽  
pp. 2020005
Author(s):  
Hao Wang ◽  
Wenming Xie ◽  
Zhixin Chen
Keyword(s):  
Dynamic Range ◽  
Supply Voltage ◽  
Sampling Rate ◽  
Cmos Technology ◽  
Switching Scheme ◽  
Common Mode ◽  
Analog To Digital ◽  
Common Mode Voltage ◽  
Switching Method ◽  
Area Efficient

A novel area-efficient switching scheme is proposed for the successive approximation register (SAR) analog-to-digital converters (ADCs). The capacitor-splitting structure, charge-average switching technique, and [Formula: see text] (equal to [Formula: see text]/4) are combined together and optimized to realize the proposed switching scheme. [Formula: see text] is only used in the last two bit cycles, which affects the ADC accuracy little and reduces capacitor area by half. It achieves a 98% less switching energy and an 87.5% less capacitor area compared with the conventional switching method. In addition, the DAC output common-mode voltage is approximately constant. Thus, the proposed switching method is a good tradeoff among power consumption, capacitor area, DAC output common-mode voltage, and ADC accuracy. The proposed SAR ADC is simulated in 0.18[Formula: see text][Formula: see text]m CMOS technology with a supply voltage of 0.6[Formula: see text]V and at a sampling rate of 20[Formula: see text]kS/s. The signal-to-noise-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 58.2 and 73.7[Formula: see text]dB, respectively. The effective number of bits (ENOB) is 9.4. It consumes 42[Formula: see text]nW, resulting in a figure-of-merit (FoM) of 3.11 fJ/conversion-step.

Reduced Common-Mode Voltage PWM Scheme for Full-SiC Three-Level Uninterruptible Power Supply With Small DC-Link Capacitors

2020 ◽  
Vol 35 (8) ◽  
pp. 8638-8651 ◽  
Author(s):  
Sungjae Ohn ◽  
Jianghui Yu ◽  
Rolando Burgos ◽  
Dushan Boroyevich ◽  
Harish Suryanarayana
Keyword(s):  
Power Supply ◽  
Common Mode ◽  
Uninterruptible Power Supply ◽  
Common Mode Voltage ◽  
Uninterruptible Power

A High-Speed and High-Linearity BiCMOS Optically Coupled Isolation Amplifier

2012 ◽  
Vol 241-244 ◽  
pp. 2200-2203
Author(s):  
Shu Han Li ◽  
Ning Yang ◽  
Li Cheng ◽  
Sheng Hua Zhang
Keyword(s):  
Power Supply ◽  
High Speed ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Power Product ◽  
High Linearity ◽  
Isolation Amplifier ◽  
Amplifier Gain ◽  
High Power Consumption ◽  
Output Stages

To improve the current non-linear optically coupled isolation amplifier and high power consumption, we designed a low-power, high-speed and high-linearity BiCMOS optically isolation amplifier. There are only two push-pull output stages configuration bipolar transistor (BJT) in the design process, the rest of the circuit is the CMOS device. To improve amplifier gain linearity and stability, we introduce the complementary symmetrical photodiode, in the optically coupled part and every amplifier, negative feedback is introduced. Experimental results indicate that the design of optically isolation amplifier ± 3 dB bandwidth increases 40 kHz than optically isolation amplifier ISO100 bipolar, When the power supply voltage is 4.8 V, the delay - power product of DP is lower than ISO100 37.3 pJ, gain linearity is up to 5.5 × 10-5, which is suitable for high-speed control system.

scholarly journals Assessment of Efficiency and Reliability of Wide Band-Gap Based H8 Inverter in Electric Vehicle Applications

Energies ◽  
2019 ◽  
Vol 12 (10) ◽  
pp. 1922 ◽  
Author(s):  
Luca Concari ◽  
Davide Barater ◽  
Andrea Toscani ◽  
Carlo Concari ◽  
Giovanni Franceschini ◽  
...  
Keyword(s):  
Ad Hoc ◽  
Wide Band ◽  
Wide Band Gap ◽  
Common Mode ◽  
Electric Motor Drives ◽  
Common Mode Voltage ◽  
Three Phase ◽  
Phase Converter ◽  
Vector Modulation ◽  
Efficiency And Reliability

This paper analyzes the performance of a three-phase converter architecture with a reduced common mode voltage to be used in electric motor drives. Starting from the classical three-phase bridge architecture, two additional switches are inserted in the DC link, in order to decouple the source from the load during the freewheeling intervals. Ad-hoc modulation strategies are introduced and evaluated against the classical three-phase space vector modulation. Three main parameters are analyzed: common mode voltage, efficiency and reliability. Experimental measurements on a converter prototype are used to evaluate the common mode performance. The efficiency in the case of Si-IGBT and SiC-MOSFETs is experimentally evaluated. Reliability analysis performed with a Coffin-Mason model showed that the higher efficiency offered by the SiC devices allows for a marked extension of the lifetime.

scholarly journals A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier

2021 ◽  
Vol 11 (6) ◽  
pp. 2528 ◽  
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Supply Voltage ◽  
Cmos Technology ◽  
Gain Bandwidth ◽  
Common Mode ◽  
Input Stage ◽  
Fully Differential ◽  
Common Mode Voltage ◽  
Rail To Rail ◽  
The Common ◽  
Ultralow Power

A novel, inverter-based, fully differential, body-driven, rail-to-rail, input stage topology is proposed in this paper. The input stage exploits a replica bias control loop to set the common mode current and a common mode feed-forward strategy to set its output common mode voltage. This novel cell is used to build an ultralow voltage (ULV), ultralow-power (ULP), two-stage, unbuffered operational amplifier. A dual path compensation strategy is exploited to improve the frequency response of the circuit. The amplifier has been designed in a commercial 130 nm CMOS technology from STMicroelectronics and is able to operate with a nominal supply voltage of 0.3 V and a power consumption as low as 11.4 nW, while showing about 65 dB gain, a gain bandwidth product around 3.6 kHz with a 50 pF load capacitance and a common mode rejection ratio (CMRR) in excess of 60 dB. Transistor-level simulations show that the proposed circuit outperforms most of the state of the art amplifiers in terms of the main figures of merit. The results of extensive parametric and Monte Carlo simulations have demonstrated the robustness of the proposed circuit to PVT and mismatch variations.

Low Cost Isolation Amplifier

1988 ◽  
Vol 25 (1) ◽  
pp. 59-62
Author(s):  
W. K. Yeung
Keyword(s):  
Low Cost ◽  
Laboratory Equipment ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Isolation Amplifier ◽  
Student Laboratory ◽  
The Common

A simple and low cost isolation amplifier is proposed as general student laboratory equipment which is used to monitor signals with a high common mode voltage, as the common practice of monitoring such signals with unearthed equipment may be dangerous. Different input and isolated output waveforms are also presented.

A 100-MS/s CMOS Sample-and-Hold Circuit with Input Common Mode Feedback

2013 ◽  
Vol 748 ◽  
pp. 847-852
Author(s):  
Jun Yang ◽  
Hong Hui Deng ◽  
Rui Zhang ◽  
Yong Sheng Yin
Keyword(s):  
High Performance ◽  
Dynamic Range ◽  
Supply Voltage ◽  
High Gain ◽  
Cmos Process ◽  
Pipelined Adc ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Sample And Hold ◽  
Feedback Capacitor

A high performance sample-and-hold (S/H) circuit with input common mode feedback (ICMFB) is presented. The ICMFB is used to ensure that the input common mode voltage for the sample-and-hold amplifier (SHA) is maintained at a known value during the hold phase of operation in order to reduce the differential output error when the sample capacitor and feedback capacitor has mismatch. Meanwhile, bootstrapped switches are used to lower the switch on-resistance and reduce the effect of switch non-idealities. Then a low power two stage high gain wideband SHA is designed to guarantee the holding accuracy. Hspice simulated results based on SMIC 0.13μm 1P5M CMOS process under 1.2V supply voltage shows a 108.4 dB spurious free dynamic range (SFDR) at Nyquist input @Fs=100MS/s. The designed S/H circuit has been used in the front end of 14-bit 100MS/s Pipelined ADC adapted for single-ended applications.

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