scholarly journals A Novel Differential Log-Companding Amplifier for Biosignal Sensing

2016 ◽  
Vol 2016 ◽  
pp. 1-7
Author(s):  
Zigang Dong ◽  
Xiaolin Zhou ◽  
Yuanting Zhang
Keyword(s):  
Power Consumption ◽  
Supply Voltage ◽  
Nonlinear Function ◽  
New Method ◽  
Total Power ◽  
Maximum Output ◽  
Output Current ◽  
Current Range ◽  
Symmetrical Configuration ◽  
Total Power Consumption

We proposed a new method for designing the CMOS differential log-companding amplifier which achieves significant improvements in linearity, common-mode rejection ratio (CMRR), and output range. With the new nonlinear function used in the log-companding technology, this proposed amplifier has a very small total harmonic distortion (THD) and simultaneously a wide output current range. Furthermore, a differential structure with conventionally symmetrical configuration has been adopted in this novel method in order to obtain a high CMRR. Because all transistors in this amplifier operate in the weak inversion, the supply voltage and the total power consumption are significantly reduced. The novel log-companding amplifier was designed using a 0.18 μm CMOS technology. Improvements in THD, output current range, noise, and CMRR are verified using simulation data. The proposed amplifier operates from a 0.8 V supply voltage, shows a 6.3 μA maximum output current range, and has a 6 μW power consumption. The THD is less than 0.03%, the CMRR of this circuit is 74 dB, and the input referred current noise density is166.1 fA/Hz. This new method is suitable for biomedical applications such as electrocardiogram (ECG) signal acquisition.

scholarly journals A Low Power Sigma-Delta Modulator with Hybrid Architecture

Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5309
Author(s):  
Shengbiao An ◽  
Shuang Xia ◽  
Yue Ma ◽  
Arfan Ghani ◽  
Chan Hwang See ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Supply Voltage ◽  
Total Power ◽  
Cmos Process ◽  
Hybrid Architecture ◽  
Sigma Delta Modulator ◽  
Dynamic Comparator ◽  
Flash Adc ◽  
Total Power Consumption

Analogue-to-digital converters (ADC) using oversampling technology and the Σ-∆ modulation mechanism are widely applied in digital audio systems. This paper presents an audio modulator with high accuracy and low power consumption by using a discrete second-order feedforward structure. A 5-bit successive approximation register (SAR) quantizer is integrated into the chip, which reduces the number of comparators and the power consumption of the quantizer compared with flash ADC-type quantizers. An analogue passive adder is used to sum the input signals and it is embedded in a SAR ADC composed of a capacitor array and a dynamic comparator which has no static power consumption. To validate the design concept, the designed modulator is developed in a 180 nm CMOS process. The peak signal to noise distortion ratio (SNDR) is calculated as 106 dB and the total power consumption of the chip is recorded as 3.654 mW at the chip supply voltage of 1.8 V. The input sine wave of 0 to 25 kHz is sampled at a sampling frequency of 3.2 Ms/s. Moreover, the results achieve a 16-bit effective number of bits (ENOB) when the amplitude of the input signal is varied between 0.15 and 1.65 V. By comparing with other modulators which were realized by a 180 nm CMOS process, the proposed architecture outperforms with lower power consumption.

scholarly journals 60 GHz Front-End Components for Broadband Wireless Communication in 130 nm CMOS Technology

2016 ◽  
Vol 21 (1) ◽  
pp. 67-77
Author(s):  
Vasilis Kolios ◽  
Konstantinos Giannakidis ◽  
Grigorios Kalivas
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Total Power ◽  
Spectral Space ◽  
60 Ghz ◽  
Front End ◽  
Total Power Consumption ◽  
5 Ghz

Abstract The over 5 GHz available spectral space allocated worldwide around the 60 GHz band, is very promising for very high data rate wireless short-range communications. In this article we present two key components for the 60 GHz front-end of a transceiver, in 130 nm RF CMOS technology: a single-balanced mixer with high Conversion Gain (CG), reduced Noise Figure (NF) and low power consumption, and an LC cross-coupled Voltage Controlled Oscillator (VCO) with very good linearity, with respect to Vctrl, and very low Phase Noise (PN). In both circuits, custom designed inductors and a balun structure for the mixer are employed, in order to enhance their performance. The VCO’s inductor achieves an inductance of 198 pH and a quality factor (Q) of 30, at 30 GHz. The balun shows less than 1o Phase Imbalance (PI) and less than 0.2 dB Amplitude Imbalance (AI), from 57 to 66 GHz. The mixer shows a CG greater than 15 dB and a NF lower than 12 dB. In addition, the VCO achieves a Phase Noise lower than -106 dBc/Hz at 1 MHz offset, and shows great linearity for the entire band. Both circuits are biased with a 1.2 V supply voltage and the total power consumption is about 10.6 mW for the mixer and 10.92 mW for the VCO.

scholarly journals Analysis of CMOS Comparator in 90nm Technology with Different Power Reduction Techniques

2018 ◽  
Vol 8 (6) ◽  
pp. 4922
Author(s):  
Anil Khatak ◽  
Manoj Kumar ◽  
Sanjeev Dhull
Keyword(s):  
Power Consumption ◽  
Leakage Current ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Power Reduction ◽  
Total Power ◽  
Low Power Consumption ◽  
Power Gating ◽  
Reduction Techniques ◽  
Total Power Consumption

To reduce power consumption of regenerative comparator three different techniques are incorporated in this work. These techniques provide a way to achieve low power consumption through their mechanism that alters the operation of the circuit. These techniques are pseudo NMOS, CVSL (cascode voltage switch logic)/DCVS (differential cascode voltage switch) & power gating. Initially regenerative comparator is simulated at 90 nm CMOS technology with 0.7 V supply voltage. Results shows total power consumption of 15.02 μW with considerably large leakage current of 52.03 nA. Further, with pseudo NMOS technique total power consumption increases to 126.53 μW while CVSL shows total power consumption of 18.94 μW with leakage current of 1270.13 nA. More then 90% reduction is attained in total power consumption and leakage current by employing the power gating technique. Moreover, the variations in the power consumption with temperature is also recorded for all three reported techniques where power gating again show optimum variations with least power consumption. Four more conventional comparator circuits are also simulated in 90nm CMOS technology for comparison. Comparison shows better results for regenerative comparator with power gating technique. Simulations are executed by employing SPICE based on 90 nm CMOS technology.

scholarly journals Reconfigurable Charge Pump Circuit with Variable Pumping Frequency Scheme for Harvesting Solar Energy under Various Sunlight Intensities

2014 ◽  
Vol 2014 ◽  
pp. 1-9
Author(s):  
Jeong Heon Kim ◽  
Sang Don Byeon ◽  
Hyun-Sun Mo ◽  
Kyeong-Sik Min
Keyword(s):  
Solar Energy ◽  
Power Consumption ◽  
Charge Pump ◽  
Maximum Amount ◽  
Maximum Power ◽  
Total Power ◽  
Output Current ◽  
Total Power Consumption ◽  
Layout Area ◽  
Charge Pump Circuit

We propose variable pumping frequency (VPF) scheme which is merged with the previous reconfigurable charge pump (RCP) circuit that can change its architecture according to a given sunlight condition. Here, merging the VPF scheme with the architecture reconfiguration can improve percentage output currents better by 21.4% and 22.4% than RCP circuit with the fixed pumping frequencies of 7 MHz and 15 MHz, respectively. Comparing the VPF scheme with real maximum power points (MPP), the VPF can deliver 91.9% of the maximum amount of output current to the load on average. In terms of the power and area overheads, the VPF scheme proposed in this paper consumes the power by 0.4% of the total power consumption and occupies the layout area by 1.61% of the total layout area.

scholarly journals Efficient Operation Method of Aquifer Thermal Energy Storage System Using Demand Response

Energies ◽  
2021 ◽  
Vol 14 (11) ◽  
pp. 3129
Author(s):  
Jewon Oh ◽  
Daisuke Sumiyoshi ◽  
Masatoshi Nishioka ◽  
Hyunbae Kim
Keyword(s):  
Energy Storage ◽  
Power Consumption ◽  
Thermal Energy ◽  
Demand Response ◽  
Thermal Energy Storage ◽  
Heat Storage ◽  
Storage System ◽  
Total Power ◽  
Operation Method ◽  
Total Power Consumption

The mass introduction of renewable energy is essential to reduce carbon dioxide emissions. We examined an operation method that combines the surplus energy of photovoltaic power generation using demand response (DR), which recognizes the balance between power supply and demand, with an aquifer heat storage system. In the case that predicts the occurrence of DR and performs DR storage and heat dissipation operation, the result was an operation that can suppress daytime power consumption without increasing total power consumption. Case 1-2, which performs nighttime heat storage operation for about 6 h, has become an operation that suppresses daytime power consumption by more than 60%. Furthermore, the increase in total power consumption was suppressed by combining DR heat storage operation. The long night heat storage operation did not use up the heat storage amount. Therefore, it is recommended to the heat storage operation at night as much as possible before DR occurs. In the target area of this study, the underground temperature was 19.1 °C, the room temperature during cooling was about 25 °C and groundwater could be used as the heat source. The aquifer thermal energy storage (ATES) system in this study uses three wells, and consists of a well that pumps groundwater, a heat storage well that stores heat and a well that used heat and then returns it. Care must be taken using such an operation method depending on the layer configuration.

Exergy Analysis of a Novel Cryogenic Concept for the Liquefaction of Natural Gas Integrated Into an Air Separation Process

2016 ◽  
Author(s):  
S. Tesch ◽  
T. Morosuk ◽  
G. Tsatsaronis
Keyword(s):  
Natural Gas ◽  
Power Consumption ◽  
Exergy Analysis ◽  
Primary Energy ◽  
Separation Process ◽  
Air Separation ◽  
Total Power ◽  
Separation Unit ◽  
Total Power Consumption ◽  
Liquefaction Temperature

The increasing demand for primary energy leads to a growing market of natural gas and the associated market for liquefied natural gas (LNG) increases, too. The liquefaction of natural gas is an energy- and cost-intensive process. After exploration, natural gas, is pretreated and cooled to the liquefaction temperature of around −160°C. In this paper, a novel concept for the integration of the liquefaction of natural gas into an air separation process is introduced. The system is evaluated from the energetic and exergetic points of view. Additionally, an advanced exergy analysis is conducted. The analysis of the concepts shows the effect of important parameters regarding the maximum amount of liquefiable of natural gas and the total power consumption. Comparing the different cases, the amount of LNG production could be increased by two thirds, while the power consumption is doubled. The results of the exergy analysis show, that the introduction of the liquefaction of natural gas has a positive effect on the exergetic efficiency of a convetional air separation unit, which increases from 38% to 49%.

scholarly journals Optimization of Power Consumption for the Design of 802.11n MIMO_OFDM System

2018 ◽  
Vol 26 (4) ◽  
pp. 172-184
Author(s):  
Muthna Jasim Fadhil
Keyword(s):  
Power Consumption ◽  
Orthogonal Frequency Division Multiplexing ◽  
High Speed ◽  
Mimo Systems ◽  
Total Power ◽  
Wireless System ◽  
Generator System ◽  
Total Power Consumption ◽  
Consumption Energy ◽  
High Reduction

In modern systems communication, different methods have been improved to change the prior imitative techniques that process communication data with high speed. It is necessary to improve (OFDM) Orthogonal Frequency Division Multiplexing technique because the development in the guideline communication of wireless system which include security data and transmission data reliability. The applications communications of wireless is important to develop in order to optimize the process of communication leads to reduce the level consumption energy of the output level signal. The architecture of VLSI is used to optimize the performance transceiver in 802.11 n OFDM-MIMO systems, this idea concentrate on the design of 6x6 MIMO_OFDM system in software simulink of MATLAB then using generator system for transfer to code of VHDL and applying in FPGA Xilinx Spartan 3 XC3S200 . The modelsim used to get the simulation while Xilinx power estimator is used to calculate power. The results registered total power consumption about 94mW while compared with previous work  was 136mW which means a high reduction of about 30.8% .

Forecasting Electricity Demand of Shanghai Based on Power Consumption Intensity Decomposition

2011 ◽  
Vol 347-353 ◽  
pp. 2796-2800
Author(s):  
Ying Ling Shi ◽  
Mei Peng
Keyword(s):  
Power Consumption ◽  
Industrial Structure ◽  
Electricity Demand ◽  
Total Power ◽  
Decomposition Model ◽  
Total Power Consumption ◽  
Consumption Intensity

The paper describes the development of economy and electricity in Shanghai, builds a decomposition model of power consumption intensity, and analyzes the impacts of industrial power consumption intensity and industrial structure for the total power consumption intensity of Shanghai. Finally, the paper uses sub-scenarios to forecast electricity demand of Shanghai during Twelfth Five-Year period. The results show that the decrease of total power consumption intensity is mainly due to the decrease of industrial power consumption intensity, and the optimization of industrial structure has some contributions to the decrease of total power consumption as well.

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