scholarly journals Compressive Detection Using Sub-Nyquist Radars for Sparse Signals

2016 ◽  
Vol 2016 ◽  
pp. 1-7
Author(s):  
Ying Sun ◽  
Jianjun Huang ◽  
Jingxiong Huang ◽  
Li Kang ◽  
Li Lei ◽  
...  

This paper investigates the compression detection problem using sub-Nyquist radars, which is well suited to the scenario of high bandwidths in real-time processing because it would significantly reduce the computational burden and save power consumption and computation time. A compressive generalized likelihood ratio test (GLRT) detector for sparse signals is proposed for sub-Nyquist radars without ever reconstructing the signal involved. The performance of the compressive GLRT detector is analyzed and the theoretical bounds are presented. The compressive GLRT detection performance of sub-Nyquist radars is also compared to the traditional GLRT detection performance of conventional radars, which employ traditional analog-to-digital conversion (ADC) at Nyquist sampling rates. Simulation results demonstrate that the former can perform almost as well as the latter with a very small fraction of the number of measurements required by traditional detection in relatively high signal-to-noise ratio (SNR) cases.

Author(s):  
Neha Jain ◽  
Nir Shlezinger ◽  
Yonina C. Eldar ◽  
Anubha Gupta ◽  
Vivek Ashok Bohara

2021 ◽  
Vol 32 (3) ◽  
Author(s):  
Ruo-Shi Dong ◽  
Lei Zhao ◽  
Jia-Jun Qin ◽  
Wen-Tao Zhong ◽  
Yi-Chun Fan ◽  
...  

1993 ◽  
Vol 7 (4) ◽  
pp. 408 ◽  
Author(s):  
James R. Matey ◽  
M.J. Lauterbach

2017 ◽  
Author(s):  
Evgenii S. Kolodeznyi ◽  
Innokenty I. Novikov ◽  
Andrey V. Babichev ◽  
Alexander S. Kurochkin ◽  
Andrey G. Gladyshev ◽  
...  

2021 ◽  
pp. 127440
Author(s):  
Hao Chi ◽  
Qiulin Zhang ◽  
Shuna Yang ◽  
Bo Yang ◽  
Yanrong Zhai ◽  
...  

2007 ◽  
Vol 16 (01) ◽  
pp. 1-14
Author(s):  
TASKIN KOCAK ◽  
GEORGE R. HARRIS ◽  
RONALD F. DEMARA

In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and designed using the NULL Convention Logic (NCL) paradigm. This analog-to-digital converter (ADC) employs successive approximation and a one-hot encoded masking technique to digitize analog signals. The architecture scales readily to any given resolution by utilizing the one-hot encoded scheme to permit identical logical components for each bit of resolution. The four-bit configuration of the proposed design has been implemented and assessed via simulation in 0.18-μm CMOS technology. Furthermore, the ADC may be interfaced with either synchronous or four-phase asynchronous digital systems.


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