scholarly journals Power Optimization of Multimode Mobile Embedded Systems with Workload-Delay Dependency

2016 ◽  
Vol 2016 ◽  
pp. 1-10
Author(s):  
Hoeseok Yang ◽  
Soonhoi Ha
Keyword(s):  
Embedded Systems ◽  
Power Optimization ◽  
Average Power ◽  
Real Life ◽  
Graph Representation ◽  
Management Policy ◽  
Average Power Consumption ◽  
Dynamic Voltage ◽  
Voltage Frequency ◽  
Closed Walk

This paper proposes to take the relationship between delay and workload into account in the power optimization of microprocessors in mobile embedded systems. Since the components outside a device continuously change their values or properties, the workload to be handled by the systems becomes dynamic and variable. This variable workload is formulated as a staircase function of the delay taken at the previous iteration in this paper and applied to the power optimization of DVFS (dynamic voltage-frequency scaling). In doing so, a graph representation of all possible workload/mode changes during the lifetime of a device, Workload Transition Graph (WTG), is proposed. Then, the power optimization problem is transformed into finding a cycle (closed walk) in WTG which minimizes the average power consumption over it. Out of the obtained optimal cycle of WTG, one can derive the optimal power management policy of the target device. It is shown that the proposed policy is valid for both continuous and discrete DVFS models. The effectiveness of the proposed power optimization policy is demonstrated with the simulation results of synthetic and real-life examples.

A Dynamic Power Management Mechanism for Embedded System with Micro-Kernel Operating System

2013 ◽  
Vol 325-326 ◽  
pp. 916-921 ◽  
Author(s):  
Jing Chen ◽  
Yu Yung Ke
Keyword(s):  
Operating System ◽  
Embedded Systems ◽  
Embedded System ◽  
Power Management ◽  
Dynamic Power Management ◽  
Management Mechanism ◽  
Dynamic Power ◽  
Dynamic Voltage ◽  
Voltage Frequency ◽  
Management Techniques

As mobile devices of embedded systems prevail in our daily life, energy saving emerges as one very important issue and power management techniques are desirable. This paper presents the design and the implementation of a dynamic power management mechanism (DPMM) for embedded systems running micro-kernel operating systems. The DPMM is composed of policy manager, DVFS (Dynamic Voltage Frequency Scaling) controller, DPM (Dynamic Power Management) server, resource management flags, and DPM library. They are imple-mented to execute on an embedded system platform equipped with an XScale PXA270 processor and various I/O interfaces or devices running Zinix micro-kernel operating system. Testing results indicate that this DPMM effectively achieves power management in the system.

scholarly journals A Novel Cross-Latch Shift Register Scheme for Low Power Applications

2020 ◽  
Vol 11 (1) ◽  
pp. 129
Author(s):  
Po-Yu Kuo ◽  
Ming-Hwa Sheu ◽  
Chang-Ming Tsai ◽  
Ming-Yan Tsai ◽  
Jin-Fa Lin
Keyword(s):  
Power Consumption ◽  
Supply Voltage ◽  
Electrical Power ◽  
Average Power ◽  
Leakage Power ◽  
Shift Register ◽  
Cmos Process ◽  
Average Power Consumption ◽  
Simulation Results ◽  
Layout Area

The conventional shift register consists of master and slave (MS) latches with each latch receiving the data from the previous stage. Therefore, the same data are stored in two latches separately. It leads to consuming more electrical power and occupying more layout area, which is not satisfactory to most circuit designers. To solve this issue, a novel cross-latch shift register (CLSR) scheme is proposed. It significantly reduced the number of transistors needed for a 256-bit shifter register by 48.33% as compared with the conventional MS latch design. To further verify its functions, this CLSR was implemented by using TSMC 40 nm CMOS process standard technology. The simulation results reveal that the proposed CLSR reduced the average power consumption by 36%, cut the leakage power by 60.53%, and eliminated layout area by 34.76% at a supply voltage of 0.9 V with an operating frequency of 250 MHz, as compared with the MS latch.

scholarly journals EZ-SEP: Extended Z-SEP Routing Protocol with Hierarchical Clustering Approach for Wireless Heterogeneous Sensor Network

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1021
Author(s):  
Zhanserik Nurlan ◽  
Tamara Zhukabayeva ◽  
Mohamed Othman
Keyword(s):  
Sensor Network ◽  
Hierarchical Clustering ◽  
Routing Protocol ◽  
Routing Protocols ◽  
Cluster Head ◽  
Average Power ◽  
Base Station ◽  
Average Power Consumption ◽  
Clustering Approach ◽  
Heterogeneous Sensor Network

Wireless sensor networks (WSN) are networks of thousands of nodes installed in a defined physical environment to sense and monitor its state condition. The viability of such a network is directly dependent and limited by the power of batteries supplying the nodes of these networks, which represents a disadvantage of such a network. To improve and extend the life of WSNs, scientists around the world regularly develop various routing protocols that minimize and optimize the energy consumption of sensor network nodes. This article, introduces a new heterogeneous-aware routing protocol well known as Extended Z-SEP Routing Protocol with Hierarchical Clustering Approach for Wireless Heterogeneous Sensor Network or EZ-SEP, where the connection of nodes to a base station (BS) is done via a hybrid method, i.e., a certain amount of nodes communicate with the base station directly, while the remaining ones form a cluster to transfer data. Parameters of the field are unknown, and the field is partitioned into zones depending on the node energy. We reviewed the Z-SEP protocol concerning the election of the cluster head (CH) and its communication with BS and presented a novel extended mechanism for the selection of the CH based on remaining residual energy. In addition, EZ-SEP is weighted up using various estimation schemes such as base station repositioning, altering the field density, and variable nodes energy for comparison with the previous parent algorithm. EZ-SEP was executed and compared to routing protocols such as Z-SEP, SEP, and LEACH. The proposed algorithm performed using the MATLAB R2016b simulator. Simulation results show that our proposed extended version performs better than Z-SEP in the stability period due to an increase in the number of active nodes by 48%, in efficiency of network by the high packet delivery coefficient by 16% and optimizes the average power consumption compared to by 34.

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