scholarly journals Low Power Systolic Array Based Digital Filter for DSP Applications

2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
S. Karthick ◽  
S. Valarmathy ◽  
E. Prabhu
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
Digital Filter ◽  
Systolic Array ◽  
Design Methodology ◽  
Biomedical Application ◽  
Digital Signal ◽  
Characteristic Parameter ◽  
Digital Form ◽  
Asic Design

Main concepts in DSP include filtering, averaging, modulating, and correlating the signals in digital form to estimate characteristic parameter of a signal into a desirable form. This paper presents a brief concept of low power datapath impact for Digital Signal Processing (DSP) based biomedical application. Systolic array based digital filter used in signal processing of electrocardiogram analysis is presented with datapath architectural innovations in low power consumption perspective. Implementation was done with ASIC design methodology using TSMC 65 nm technological library node. The proposed systolic array filter has reduced leakage power up to 8.5% than the existing filter architectures.

Low-Power Digital Signal Processing Using Approximate Adders

2013 ◽  
Vol 32 (1) ◽  
pp. 124-137 ◽  
Author(s):  
Vaibhav Gupta ◽  
Debabrata Mohapatra ◽  
Anand Raghunathan ◽  
Kaushik Roy
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Low Power ◽  
Digital Signal

scholarly journals Low Power Design for ASIC Cores

VLSI Design ◽  
2001 ◽  
Vol 12 (3) ◽  
pp. 317-331
Author(s):  
Alvar Dean ◽  
David Garrett ◽  
Mircea R. Stan ◽  
Sebastian Ventrone
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Low Power Design ◽  
Clock Gating ◽  
Asic Design ◽  
Design Techniques

A semicustom ASIC design methodology is used to develop a low power DSP core for mobile (battery powered) applications. Different low power design techniques are used, including dual voltage, low power library elements, accurate power reporting, pseudomicrocode, transition-once logic, clock gating, and others.

scholarly journals Baseband I/Q regeneration Method for Direct Conversion Receiver to nullify effect of I/Q mismatch

2016 ◽  
Vol 5 (3) ◽  
pp. 50 ◽  
Author(s):  
M. Shah ◽  
S. Gupta
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Low Power ◽  
Digital Signal ◽  
Direct Conversion ◽  
Performance Degradation ◽  
Wireless Receiver ◽  
Novel Method ◽  
The One

Direct Conversion Receiver is the choice of the today’s designer for low power compact wireless receiver. DCR is attractive due to low power, small size and highly monolithic integratable structure, but distortions affect its performance.  I/Q mismatch is the one of the major distortion which is responsible for performance degradation.  In this paper, a novel method for Direct Conversion Receiver is suggested, which makes it insensitive to the I/Q mismatch. Here the classical homodyne architecture is modified to nullify effect of I/Q mismatch. The proposed method can be implemented in the Digital Signal Processing (DSP) back-end section also.  This feature makes it acceptable in the already designed/functioning classical homodyne architecture based receiver.

scholarly journals A Method of Increasing Digital Filter Performance Based on Truncated Multiply-Accumulate Units

2020 ◽  
Vol 10 (24) ◽  
pp. 9052
Author(s):  
Pavel Lyakhov ◽  
Maria Valueva ◽  
Georgii Valuev ◽  
Nikolai Nagornov
Keyword(s):  
Signal Processing ◽  
Theoretical Analysis ◽  
Digital Signal Processing ◽  
Digital Filter ◽  
Digital Filters ◽  
Digital Signal ◽  
Digital Filtering ◽  
Filter Performance ◽  
Filter Architecture ◽  
Hardware Costs

This paper proposes new digital filter architecture based on a modified multiply-accumulate (MAC) unit architecture called truncated MAC (TMAC), with the aim of increasing the performance of digital filtering. This paper provides a theoretical analysis of the proposed TMAC units and their hardware simulation. Theoretical analysis demonstrated that replacing conventional MAC units with modified TMAC units, as the basis for the implementation of digital filters, can theoretically reduce the filtering time by 29.86%. Hardware simulation showed that TMAC units increased the performance of digital filters by up to 10.89% compared to digital filters using conventional MAC units, but were associated with increased hardware costs. The results of this research can be used in the theory of digital signal processing to solve practical problems such as noise reduction, amplification and suppression of the frequency spectrum, interpolation, decimation, equalization and many others.

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