scholarly journals On Analyzing LDPC Codes over Multiantenna MC-CDMA System

2014 ◽  
Vol 2014 ◽  
pp. 1-6
Author(s):  
S. Suresh Kumar ◽  
M. Rajaram
Keyword(s):  
Communication Systems ◽  
Ldpc Codes ◽  
Ldpc Code ◽  
Cdma System ◽  
Low Density ◽  
Parity Check ◽  
Simple Method ◽  
Broadband Wireless ◽  
Low Density Parity Check ◽  
Code Division Multiple

Multiantenna multicarrier code-division multiple access (MC-CDMA) technique has been attracting much attention for designing future broadband wireless systems. In addition, low-density parity-check (LDPC) code, a promising near-optimal error correction code, is also being widely considered in next generation communication systems. In this paper, we propose a simple method to construct a regular quasicyclic low-density parity-check (QC-LDPC) code to improve the transmission performance over the precoded MC-CDMA system with limited feedback. Simulation results show that the coding gain of the proposed QC-LDPC codes is larger than that of the Reed-Solomon codes, and the performance of the multiantenna MC-CDMA system can be greatly improved by these QC-LDPC codes when the data rate is high.

scholarly journals Design of Quasi-Cyclic Low Density Parity Check Decoder Using Optimized Min-Sum Algorithm

2018 ◽  
Vol 7 (03) ◽  
pp. 23781-23784
Author(s):  
Rajarshini Mishra
Keyword(s):  
Variance Estimation ◽  
Cyclic Codes ◽  
Ldpc Codes ◽  
Ldpc Code ◽  
Low Complexity ◽  
Low Density ◽  
Parity Check ◽  
Decoding Algorithm ◽  
Low Density Parity Check ◽  
Xilinx Fpga

Low-density parity-check (LDPC) have been shown to have good error correcting performance approaching Shannon’s limit. Good error correcting performance enables efficient and reliable communication. However, a LDPC code decoding algorithm needs to be executed efficiently to meet cost , time, power and bandwidth requirements of target applications. Quasi-cyclic low-density parity-check (QC-LDPC) codes are an important subclass of LDPC codes that are known as one of the most effective error controlling methods. Quasi cyclic codes are known to possess some degree of regularity. Many important communication standards such as DVB-S2 and 802.16e use these codes. The proposed Optimized Min-Sum decoding algorithm performs very close to the Sum-Product decoding while preserving the main features of the Min-Sum decoding, that is low complexity and independence with respect to noise variance estimation errors.Proposed decoder is well matched for VLSI implementation and will be implemented on Xilinx FPGA family

Rate and Performance Enhancement of LDPC Codes Using Collection of Punctured Codes Decoding (CPCD)

2021 ◽  
Vol 11 ◽  
Author(s):  
Rana A. Hassan ◽  
John P. Fonseka
Keyword(s):  
Communication Systems ◽  
Ldpc Codes ◽  
Superior Performance ◽  
Low Density ◽  
Parity Check ◽  
Decoding Complexity ◽  
Low Density Parity Check ◽  
Punctured Codes ◽  
Punctured Code ◽  
Decoding Delay

Background: Low-density parity-check (LDPC) codes have received significant interest in a variety of communication systems due to their superior performance and reasonable decoding complexity. Methods: A novel collection of punctured codes decoding (CPCD) technique that considers a code as a collection of its punctured codes is proposed. Two forms of CPCD, serial CPCD that decodes each punctured code serially and parallel CPCD that decodes each punctured code in parallel, are discussed. Results: It is demonstrated that both serial and parallel CPCD have about the same decoding complexity compared with standard sum product algorithm (SPA) decoding. It is also demonstrated that while serial CPCD has about the same decoding delay compared with standard SPA decoding, parallel CPCD can decrease the decoding delay, however, at the expense of processing power. Conclusion: Numerical results demonstrate that CPCD can significantly improve the performance, or significantly increase the code rate of low-density parity-check (LDPC) codes.

scholarly journals High-Throughput Multi-Frame Decoding of QC-LDPC Codes with Modified Rejection-Based Minimum Finding

2021 ◽  
Author(s):  
Alireza Hasani ◽  
Lukasz Lopacinski ◽  
Rolf Kraemer
Keyword(s):  
Ldpc Codes ◽  
Ldpc Code ◽  
Cmos Technology ◽  
Low Density ◽  
Parity Check ◽  
Decoding Algorithm ◽  
Chip Area ◽  
Tanner Graph ◽  
Low Density Parity Check ◽  
The One

<p>The key computation in the min-sum decoding algorithm of a Low-Density Parity-Check (LDPC) code is finding the first two minima and also the location of the first minimum among a set of messages passed from Variable Nodes (VNs) to Check Nodes (CNs) in a Tanner graph. In this paper, we propose a modified rejection-based scheme for this task which is able to find the one-hot sequence of the minimum location instead of its index. We show that this modification effectively reduces the complexity of min-sum decoding algorithm. Additionally, we reveal a pipelining potential in such a rejection- based architecture which facilitates the multi-frame decoding of LDPC codes and therefore results in improvement in decoding throughput with bearable hardware overhead. Synthesis in an industrial 28nm CMOS technology shows improved results in terms of throughput, power, and chip area.</p>

scholarly journals Performance of Hybrid RF/FSO Cooperative Systems Based on Quasicyclic LDPC Codes and Space-Coupled LDPC Codes

2020 ◽  
Vol 2020 ◽  
pp. 1-15
Author(s):  
Ibrahima Gueye ◽  
Ibra Dioum ◽  
Idy Diop ◽  
K. Wane Keita ◽  
Papis Ndiaye ◽  
...  
Keyword(s):  
Communication Systems ◽  
Additive White Gaussian Noise ◽  
Ldpc Codes ◽  
Cooperative Systems ◽  
Error Correcting Codes ◽  
Cooperative Transmission ◽  
Low Density ◽  
Parity Check ◽  
Transmission Systems ◽  
Low Density Parity Check

Free space optical (FSO) communication systems provide wireless line of sight connectivity in the unlicensed spectrum, and wireless optical communication achieves higher data rates compared to their radio frequency (RF) counterparts. FSO systems are particularly attractive for last mile access problem by bridging fiber optic backbone connectivity to RF access networks. To cope with this practical deployment scenario, there has been increasing attention to the so-called dual-hop (RF/FSO) systems where RF transmission is used at a hop followed by FSO transmission to another. In this article, we study the performance of cooperative transmission systems using a mixed RF-FSO DF (decode and forward) relay using error-correcting codes including QC-LDPC codes at the relay level. The FSO link is modeled by the gamma-gamma distribution, and the RF link is modeled by the Additive White Gaussian Noise (AWGN) model. Another innovation in this article is the use of cooperative systems using a mixed FSO/RF DF relay using quasicyclic low-density parity check (QC-LDPC) codes at the relay level. We also use the space-coupled low-density parity check (SC-LDPC) codes on the same scheme to show its importance in cooperative optical transmission but also in hybrid RF/FSO transmission. The latter will be compared with QC-LDPC codes. The use of mixed RF/FSO cooperative transmission systems can improve the reliability and transmission of information in networks. The results demonstrate an improvement in the performance of the cooperative RF/FSO DF system based on QC-LDPC and SC-LDPC codes compared to RF/FSO systems without the use of codes, but also to the DF systems proposed in the existing literature.

scholarly journals High-Throughput Multi-Frame Decoding of QC-LDPC Codes with Modified Rejection-Based Minimum Finding

2021 ◽  
Author(s):  
Alireza Hasani ◽  
Lukasz Lopacinski ◽  
Rolf Kraemer
Keyword(s):  
Ldpc Codes ◽  
Ldpc Code ◽  
Cmos Technology ◽  
Low Density ◽  
Parity Check ◽  
Decoding Algorithm ◽  
Chip Area ◽  
Tanner Graph ◽  
Low Density Parity Check ◽  
The One

<p>The key computation in the min-sum decoding algorithm of a Low-Density Parity-Check (LDPC) code is finding the first two minima and also the location of the first minimum among a set of messages passed from Variable Nodes (VNs) to Check Nodes (CNs) in a Tanner graph. In this paper, we propose a modified rejection-based scheme for this task which is able to find the one-hot sequence of the minimum location instead of its index. We show that this modification effectively reduces the complexity of min-sum decoding algorithm. Additionally, we reveal a pipelining potential in such a rejection- based architecture which facilitates the multi-frame decoding of LDPC codes and therefore results in improvement in decoding throughput with bearable hardware overhead. Synthesis in an industrial 28nm CMOS technology shows improved results in terms of throughput, power, and chip area.</p>

Low-density parity-check codes for noncoherent UWB communication systems

2017 ◽  
Vol 14 (7) ◽  
pp. 1-11 ◽  
Author(s):  
Zhonghua Liang ◽  
Junshan Zang ◽  
Xiaojun Yang ◽  
Xiaodai Dong ◽  
Huansheng Song
Keyword(s):  
Communication Systems ◽  
Low Density ◽  
Parity Check ◽  
Low Density Parity Check ◽  
Parity Check Codes ◽  
Uwb Communication

scholarly journals Hardwarearchitektur für einen universellen LDPC Decoder

2009 ◽  
Vol 7 ◽  
pp. 213-218
Author(s):  
C. Beuschel ◽  
H.-J. Pfleiderer
Keyword(s):  
Ldpc Code ◽  
Low Density ◽  
Parity Check ◽  
Wird Eine ◽  
Ldpc Decoder ◽  
Low Density Parity Check

Abstract. Im vorliegenden Beitrag wird eine universelle Decoderarchitektur für einen Low-Density Parity-Check (LDPC) Code Decoder vorgestellt. Anders als bei den in der Literatur häufig beschriebenen Architekturen für strukturierte Codes ist die hier vorgestellte Architektur frei programmierbar, so dass jeder beliebige LDPC Code durch eine Änderung der Initialisierung des Speichers für die Prüfmatrix mit derselben Hardware decodiert werden kann. Die größte Herausforderung beim Entwurf von teilparallelen LDPC Decoder Architekturen liegt im konfliktfreien Datenaustausch zwischen mehreren parallelen Speichern und Berechnungseinheiten, wozu ein Mapping und Scheduling Algorithmus benötigt wird. Der hier vorgestellte Algorithmus stützt sich auf Graphentheorie und findet für jeden beliebigen LDPC Code eine für die Architektur optimale Lösung. Damit sind keine Wartezyklen notwendig und die Parallelität der Architektur wird zu jedem Zeitpunkt voll ausgenutzt.

scholarly journals A New Reliability Ratio Weighted Bit Flipping Algorithm for Decoding LDPC Codes

2021 ◽  
Vol 2021 ◽  
pp. 1-11
Author(s):  
Chakir Aqil ◽  
Ismail Akharraz ◽  
Abdelaziz Ahaitouf
Keyword(s):  
Gaussian Noise ◽  
Additive White Gaussian Noise ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Coding Gain ◽  
Decoding Complexity ◽  
Low Density Parity Check ◽  
Awgn Channel ◽  
Infinite Loop

In this study, we propose a “New Reliability Ratio Weighted Bit Flipping” (NRRWBF) algorithm for Low-Density Parity-Check (LDPC) codes. This algorithm improves the “Reliability Ratio Weighted Bit Flipping” (RRWBF) algorithm by modifying the reliability ratio. It surpasses the RRWBF in performance, reaching a 0.6 dB coding gain at a Binary Error Rate (BER) of 10−4 over the Additive White Gaussian Noise (AWGN) channel, and presents a significant reduction in the decoding complexity. Furthermore, we improved NRRWBF using the sum of the syndromes as a criterion to avoid the infinite loop. This will enable the decoder to attain a more efficient and effective decoding performance.

AN EXPLORATION OF NON-ASYMPTOTIC LOW-DENSITY, PARITY CHECK ERASURE CODES FOR WIDE-AREA STORAGE APPLICATIONS

2007 ◽  
Vol 17 (01) ◽  
pp. 103-123 ◽  
Author(s):  
JAMES S. PLANK ◽  
MICHAEL G. THOMASON
Keyword(s):  
Storage Systems ◽  
Distributed Storage ◽  
Ldpc Codes ◽  
Peer To Peer ◽  
Erasure Codes ◽  
Low Density ◽  
Parity Check ◽  
Finite Systems ◽  
Low Density Parity Check ◽  
Distributed Storage Systems

As peer-to-peer and widely distributed storage systems proliferate, the need to perform efficient erasure coding, instead of replication, is crucial to performance and efficiency. Low-Density Parity-Check (LDPC) codes have arisen as alternatives to standard erasure codes, such as Reed-Solomon codes, trading off vastly improved decoding performance for inefficiencies in the amount of data that must be acquired to perform decoding. The scores of papers written on LDPC codes typically analyze their collective and asymptotic behavior. Unfortunately, their practical application requires the generation and analysis of individual codes for finite systems. This paper attempts to illuminate the practical considerations of LDPC codes for peer-to-peer and distributed storage systems. The three main types of LDPC codes are detailed, and a huge variety of codes are generated, then analyzed using simulation. This analysis focuses on the performance of individual codes for finite systems, and addresses several important heretofore unanswered questions about employing LDPC codes in real-world systems.

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