scholarly journals An Inductorless Cascaded Phase-Locked Loop with Pulse Injection Locking Technique in 90 nm CMOS

2013 ◽  
Vol 2013 ◽  
pp. 1-11 ◽  
Author(s):  
Sang-yeop Lee ◽  
Hiroyuki Ito ◽  
Shuhei Amakawa ◽  
Noboru Ishihara ◽  
Kazuya Masu
Keyword(s):  
Phase Noise ◽  
High Frequency ◽  
Reference Signal ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Injection Locking ◽  
The Other ◽  
Pulse Injection ◽  
Noise Characteristics ◽  
Reference Signals

An inductorless phase-locked loop with subharmonic pulse injection locking was realized (PLL area: 0.11 mm2) by adopting 90 nm Si CMOS technology. The proposed circuit is configured with two cascaded PLLs; one of them is a reference PLL that generates reference signals to the other one from low-frequency external reference signals. The other is a main PLL that generates high-frequency output signals. A high-frequency half-integral subharmonic locking technique was used to decrease the phase noise characteristics. For a 50 MHz input reference signal, without injection locking, the 1 MHz offset phase noise was −88 dBc/Hz at a PLL output frequency of 7.2 GHz (= 144 × 50 MHz); with injection locking, the noise was −101 dBc/Hz (spur level: −31 dBc; power consumption from a 1.0 V power supply: 25 mW).

scholarly journals An Interpolated Flying-Adder-Based Frequency Synthesizer

2011 ◽  
Vol 2011 ◽  
pp. 1-11 ◽  
Author(s):  
Pao-Lung Chen ◽  
Chun-Chien Tsai
Keyword(s):  
Root Mean Square ◽  
Frequency Synthesizer ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Core Area ◽  
Mean Square ◽  
Output Frequency ◽  
Test Chip ◽  
The Core ◽  
Reference Signals

This work presents an interpolated flying-adder- (FA-) based frequency synthesizer. The architecture of an interpolated FA, which uses an interpolated multiplexer (MUX) to replace the multiplexer in conventional flying adder, improves the cycle-to-cycle jitter and root-mean-square (RMS) jitter performance. A multiphase all-digital phase-locked loop (ADPLL) provides steady reference signals for the interpolated flying adder. This paper reveals implementation skills of a multiphase ADPLL, as well as an interpolated flying adder. In addition, analytical details of the jitter performance are derived. A test chip for the proposed interpolated FA-based frequency synthesizer was fabricated in a standard 0.18 μm CMOS technology, and the core area was 0.143 mm2. The output frequency had a range of 33 MHz ~ 286 MHz at 1.8 V with peak-to-peak (Pk-Pk) jitter 215.2 ps at 286 MHz/1.8 V.

15 GHz quadrature voltage controlled oscillator in 130 nm CMOS technology

2011 ◽  
Vol 3 (6) ◽  
pp. 627-631 ◽  
Author(s):  
Paolo Lucchi ◽  
Davide Dermit ◽  
Gilles Jacquemod ◽  
Jean Baptiste Begueret ◽  
Mattia Borgarino
Keyword(s):  
Phase Noise ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Noise Performance ◽  
Commercial Products ◽  
Satellite Applications ◽  
Phase Noise Performance

This paper reports a 15 GHz quadrature voltage controlled oscillator (QVCO) designed in a 130 nm CMOS technology. The phase noise performance of the QVCO and of a phase locked loop (PLL) where the QVCO was inserted were compared with the literature and with telecom standards and commercial products for broadcast satellite applications.

Phase noise reduction by optical phase-locked loop for a coherent bichromatic laser based on the injection-locking technique

2018 ◽  
Vol 89 (1) ◽  
pp. 013103 ◽  
Author(s):  
C. F. Wu ◽  
X. S. Yan ◽  
J. Q. Huang ◽  
J. W. Zhang ◽  
L. J. Wang
Keyword(s):  
Noise Reduction ◽  
Phase Noise ◽  
Phase Locked Loop ◽  
Injection Locking ◽  
Optical Phase

scholarly journals A Low Jitter – Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer Cmos Technology

2019 ◽  
Vol 8 (4) ◽  
pp. 3994-3999
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
High Speed ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Critical Parameters ◽  
Nanometer Cmos ◽  
Dc Power ◽  
Low Jitter ◽  
Low Phase Noise

For high speed communication applications; jitter, phase noise and power consumption are most critical parameters required to be considered for PLL designs. A sub harmonically injection locking concept can be used in PLL to reduce jitter and phase noise. Such design is very effective for high frequency applications. This article presents similar design for 7.5-GHz Phase locked loop in 180 nm CMOS technology. The measured phase noise of the proposed PLL with self aligned injection at 1 MHz offset is 121.14 dBc/Hz and rms jitter is 110 fs. The total dc power consumption is 13.99 mW. To support the claim process variation with design corner analysis using random variations are carried out.

Implementation of a single-channel active noise control system with multiple reference sensors

2020 ◽  
Vol 68 (5) ◽  
pp. 358-366
Author(s):  
H.E. Oh ◽  
W.B. Jeong ◽  
C. Hong
Keyword(s):  
Single Channel ◽  
Control Method ◽  
Reference Signal ◽  
Active Noise Control ◽  
Multiple Source ◽  
Weighted Sum ◽  
Reference Signals ◽  
Feedforward Controller ◽  
Channel Control ◽  
Source Signals

When multiple sources contribute competitively to the noise level, multi-channel control architecture is needed, leading to more cost and time for control computation. We, hence, are concerned with a single-channel control method with a single-reference signal obtained from a linear combination of the multiple source signals. First, we selected 3 source signal sensors for the reference signals and the error sensor, selected a proper actuator and designed the controllers: 3 cases of single-channel feedforward controllers with a single-reference signal respectively from the source signals, a multi-channel feedforward controller with the reference signals from the source signals, and the proposed controller with the reference signal from weighted sum of the source signals. The weighting factors and the filter coefficients of the controller were determined by the FxLMS algorithm. An experiment was then performed to confirm the effectiveness of the proposed method comparing the control performance with other methods for a tower air conditioner. The overall sound pressure level (SPL) detected by the error sensor is compared to evaluate their performance. The reduction in the overall SPL was obtained by 4.74 dB, 1.96 dB and 6.62 dB, respectively, when using each of the 3 reference signals. Also, the overall SPL was reduced by 7.12 dB when using the multi-reference controller and by 7.66 dB when using the proposed controller. Conclusively, under the multiple source contribution, a single-channel feed forward controller with the reference signal from a weighted sum of the source signals works well with lower cost than multi-channel feedforward controller.

scholarly journals Chance or Necessity—The Fungi Co−Occurring with Formica polyctena Ants

Insects ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 204
Author(s):  
Igor Siedlecki ◽  
Michał Gorczak ◽  
Alicja Okrasińska ◽  
Marta Wrzosek
Keyword(s):  
Molecular Identification ◽  
High Frequency ◽  
Its Rdna ◽  
The Other ◽  
Formica Polyctena ◽  
Ant Nests ◽  
Mutualistic Fungi ◽  
The Tropics ◽  
High Diversity ◽  
Better Than

Studies on carton nesting ants and domatia−dwelling ants have shown that ant–fungi interactions may be much more common and widespread than previously thought. Until now, studies focused predominantly on parasitic and mutualistic fungi–ant interactions occurring mostly in the tropics, neglecting less−obvious interactions involving the fungi common in ants’ surroundings in temperate climates. In our study, we characterized the mycobiota of the surroundings of Formica polyctena ants by identifying nearly 600 fungal colonies that were isolated externally from the bodies of F. polyctena workers. The ants were collected from mounds found in northern and central Poland. Isolated fungi were assigned to 20 genera via molecular identification (ITS rDNA barcoding). Among these, Penicillium strains were the most frequent, belonging to eight different taxonomic sections. Other common and widespread members of Eurotiales, such as Aspergillus spp., were isolated very rarely. In our study, we managed to characterize the genera of fungi commonly present on F. polyctena workers. Our results suggest that Penicillium, Trichoderma, Mucor, Schwanniomyces and Entomortierella are commonly present in F. polyctena surroundings. Additionally, the high diversity and high frequency of Penicillium colonies isolated from ants in this study suggest that representatives of this genus may be adapted to survive in ant nests environment better than the other fungal groups, or that they are preferentially sustained by the insects in nests.

Normal Synaptonemal Complex and Abnormal Recombination Nodules in Two Alleles of the Drosophila Meiotic Mutant mei-W68

Genetics ◽  
2003 ◽  
Vol 163 (4) ◽  
pp. 1337-1356 ◽  
Author(s):  
Adelaide T C Carpenter
Keyword(s):  
Electron Microscopy ◽  
Synaptonemal Complex ◽  
High Frequency ◽  
Serial Section ◽  
The Other ◽  
Wild Type ◽  
Recombination Nodules ◽  
Section Electron ◽  
Serial Section Electron Microscopy ◽  
Section Electron Microscopy

Abstract The meiotic phenotypes of two mutant alleles of the mei-W68 gene, 1 and L1, were studied by genetics and by serial-section electron microscopy. Despite no or reduced exchange, both mutant alleles have normal synaptonemal complex. However, neither has any early recombination nodules; instead, both exhibit high numbers of very long (up to 2 μm) structures here named “noodles.” These are hypothesized to be formed by the unchecked extension of identical but much shorter structures ephemerally seen in wild type, which may be precursors of early recombination nodules. Although the mei-W68L1 allele is identical to the mei-W681 allele in both the absence of early recombination nodules and a high frequency of noodles (i.e., it is amorphic for the noodle phene), it is hypomorphic in its effects on exchange and late recombination nodules. The differential effects of this allele on early and late recombination nodules are consistent with the hypothesis that Drosophila females have two separate recombination pathways—one for simple gene conversion, the other for exchange.

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