scholarly journals Parallel PWMs Based Fully Digital Transmitter with Wide Carrier Frequency Range

2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
Bo Zhou ◽  
Kun Zhang ◽  
Wenbiao Zhou ◽  
Yanjun Zhang ◽  
Dake Liu

The carrier-frequency (CF) and intermediate-frequency (IF) pulse-width modulators (PWMs) based on delay lines are proposed, where baseband signals are conveyed by both positions and pulse widths or densities of the carrier clock. By combining IF-PWM and precorrected CF-PWM, a fully digital transmitter with unit-delay autocalibration is implemented in 180 nm CMOS for high reconfiguration. The proposed architecture achieves wide CF range of 2 M–1 GHz, high power efficiency of 70%, and low error vector magnitude (EVM) of 3%, with spectrum purity of 20 dB optimized in comparison to the existing designs.

2014 ◽  
Vol 596 ◽  
pp. 794-798
Author(s):  
Rui Zhang ◽  
Zhi Bin Zeng

The main disadvantage of multicarrier system is the high peak-to-average power ratio which can easily result in significant cut-the-top distortion of power amplifier. However, the power efficiency of power amplifier will be reduced by power back-off technology. Therefore, crest factor reduction is important in reducing the peak-to-average power ratio of multicarrier system and improving the efficiency of power amplifier. The peak-to-average power ratio can be effectively reduced with small distortion by the algorithm of crest factor reduction based on peak cancellation. And the performance of peak-to-average power ratio is better with the same error vector magnitude.


2018 ◽  
Vol 2 (1) ◽  
pp. 30
Author(s):  
Hisatsugu Kato ◽  
Yoichi Ishizuka ◽  
Kohei Ueda ◽  
Shotaro Karasuyama ◽  
Atsushi Ogasahara

This paper proposes a design technique of high power efficiency LLC DC-DC Converters for Photovoltaic Cells. The secondary side circuit and transformer fabrication of proposed circuit are optimized for overcoming the disadvantage of limited input voltage range and, realizing high power efficiency over a wide load range of LLC DC-DC converters. The optimized technique is described with theoretically and with simulation results. Some experimental results have been obtained with the prototype circuit designed for the 80 - 400 V input voltage range. The maximum power efficiency is 98 %.


2009 ◽  
Vol 30 (9) ◽  
pp. 095015
Author(s):  
Zheng Ran ◽  
Wei Tingcun ◽  
Wang Jia ◽  
Gao Deyuan

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