scholarly journals An Optimization Mechanism Intended for Static Power Reduction Using Dual-Technique

2012 ◽  
Vol 2012 ◽  
pp. 1-12
Author(s):  
Rodolfo P. Santos ◽  
Gabriela S. Clemente ◽  
Abel Silva-Filho ◽  
Cristiano Araújo ◽  
Adriano Sarmento ◽  
...  
Keyword(s):  
Power Reduction ◽  
Design Flow ◽  
Integrated Systems ◽  
Circuit Modeling ◽  
Cell Replacement ◽  
Consumption Reduction ◽  
Static Power ◽  
A Cell ◽  
Optimization Mechanism ◽  
Threshold Technique

Power consumption reduction is a challenge nowadays. Techniques for dynamic and static power minimization have been proposed, but most of them are very time consuming. This work proposes an algorithm for reducing static power, which can be perfectly inserted in the conventional design flow for integrated systems considering an open source environment (open accessinfrastructure). The proposed approach, based on a Dual-Threshold technique, replaces part of the cells of the circuit by cells with a higher threshold voltage without resulting in timing violations in the circuit. The decision to replace a cell is based on timing estimates of the circuit modeling with the cell replacement, before it is actually replaced. The fact that only some cells are replaced every iteration results in a reduction of the runtime of the algorithm. Additionally, results showed a reduction in static power up to 39.28%, when applying the proposed approach in the ISCAS85 benchmark circuits.

scholarly journals Countermeasures against Static Power Attacks

2021 ◽  
pp. 780-805
Author(s):  
Thorben Moos ◽  
Amir Moradi
Keyword(s):  
Process Variations ◽  
Cost Effective ◽  
Design Flow ◽  
Sensitive Information ◽  
Standard Cell ◽  
Aging Effects ◽  
Cell Library ◽  
Effective Option ◽  
Static Power ◽  
Power Attacks

In recent years it has been demonstrated convincingly that the standby power of a CMOS chip reveals information about the internally stored and processed data. Thus, for adversaries who seek to extract secrets from cryptographic devices via side-channel analysis, the static power has become an attractive quantity to obtain. Most works have focused on the destructive side of this subject by demonstrating attacks. In this work, we examine potential solutions to protect circuits from silently leaking sensitive information during idle times. We focus on countermeasures that can be implemented using any common digital standard cell library and do not consider solutions that require full-custom or analog design flow. In particular, we evaluate and compare a set of five distinct standard-cell-based hiding countermeasures, including both, randomization and equalization techniques. We then combine the hiding countermeasures with state-of-the-art hardware masking in order to amplify the noise level and achieve a high resistance against attacks. An important part of our contribution is the proposal and evaluation of the first ever standard-cell-based balancing scheme which achieves perfect data-independence on paper, i.e., in absence of intra-die process variations and aging effects. We call our new countermeasure Exhaustive Logic Balancing (ELB). While this scheme, applied to a threshold implementation, provides the highest level of resistance in our experiments, it may not be the most cost effective option due to the significant resource overhead associated. All evaluated countermeasures and combinations thereof are applied to a serialized hardware implementation of the PRESENT block cipher and realized as cryptographic co-processors on a 28nm CMOS ASIC prototype. Our experimental results are obtained through real-silicon measurements of a fabricated die of the ASIC in a temperature-controlled environment using a source measure unit (SMU). We believe that our elaborate comparison serves as a useful guideline for hardware designers to find a proper tradeoff between security and cost for almost any application.

scholarly journals An Efficient Power Optimized 32 bit BCD Adder Using Multi-Channel Technique

2017 ◽  
Vol 6 (02) ◽  
pp. 07-12
Author(s):  
Diksha Siddhamshittiwar
Keyword(s):  
Average Power ◽  
Full Adder ◽  
Deep Submicron ◽  
Power Reduction ◽  
Vlsi Circuits ◽  
Power Gating ◽  
Static Power ◽  
Simulation Results ◽  
Efficient Power ◽  
Standby Mode

Static power reduction is a challenge in deep submicron VLSI circuits. In this paper 28T full adder circuit, 14T full adder circuit and 32 bit power gated BCD adder using the full adders respectively were designed and their average power was compared. In existing work a conventional full adder is designed using 28T and the same is used to design 32 bit BCD adder. In the proposed architecture 14T transmission gate based power gated full adder is used for the design of 32 bit BCD adder. The leakage supremacy dissipated during standby mode in all deep submicron CMOS devices is reduced using efficient power gating and multi-channel technique. Simulation results were obtained using Tanner EDA and TSMC_180nm library file is used for the design of 28T full adder, 14T full adder and power gated BCD adder and a significant power reduction is achieved in the proposed architecture.

Static Power Reduction Using Variation-Tolerant and Reconfigurable Multi-Mode Power Switches

2014 ◽  
Vol 22 (1) ◽  
pp. 13-26 ◽  
Author(s):  
Zhaobo Zhang ◽  
Xrysovalantis Kavousianos ◽  
Krishnendu Chakrabarty ◽  
Yiorgos Tsiatouhas
Keyword(s):  
Power Reduction ◽  
Power Switches ◽  
Static Power ◽  
Multi Mode

scholarly journals Single Cell Gene Expression Analysis Reveals Human Stem Cell-Derived Graft Composition in a Cell Therapy Model of Parkinson’s Disease

2019 ◽  
Author(s):  
Katarína Tiklová ◽  
Sara Nolbrant ◽  
Alessandro Fiorenzano ◽  
Åsa K. Björklund ◽  
Yogita Sharma ◽  
...  
Keyword(s):  
Parkinson’S Disease ◽  
Stem Cells ◽  
Parkinson's Disease ◽  
Single Cell ◽  
Fetal Tissue ◽  
Fetal Cell ◽  
Term Survival ◽  
Cell Replacement ◽  
A Cell ◽  
Graft Composition

Since the pioneering studies using fetal cell transplants in Parkinson’s disease (PD), brain repair by cell replacement has remained a long-standing and realistic goal for the treatment of neurodegenerative disorders including PD. Authentic and functional midbrain dopamine (DA) neurons can now be generated from human pluripotent stem cells (hPSCs) via a floor plate intermediate1,2, and these cell preparations are both safe and functional when transplanted to animal models of PD3. However, although resulting grafts from fetal brain tissue and hPSCs contain large numbers of desired DA neurons, these therapeutic cells are a minor component of the grafts. Moreover, the cellular composition of the graft has remained difficult to assess due to limitations in histological methods that rely on pre-conceived notions concerning cell types. Here, we used single cell RNA sequencing (scRNA-seq) combined with comprehensive histological analyses to characterize intracerebral grafts from ventral midbrain (VM)-patterned human embryonic stem cells (hESCs) and VM fetal tissue after long-term survival and functional maturation in a pre-clinical rat model of PD. The analyses revealed that while both cell preparations gave rise to neurons and astrocytes, oligodendrocytes were only detected in grafts of fetal tissue. On the other hand, a cell type closely resembling a class of newly identified perivascular-like cells was identified as a unique component of hESC-derived grafts. The presence of these cells was confirmed in transplants from three different hESC lines, as well as from iPSCs. Thus, these experiments have addressed one of the major outstanding questions in the field of cell replacement in neurological disease by revealing graft composition and differences between hESC- and fetal cell-derived grafts, which can have important implications for clinical trials.

scholarly journals 3270 Patient Attitudes Survey to Guide Development of a Cell Replacement Device for the Management of Type 1 Diabetes

2019 ◽  
Vol 3 (s1) ◽  
pp. 18-18
Author(s):  
Ethan William Law
Keyword(s):  
Type 1 Diabetes ◽  
Stem Cell ◽  
Patient Attitudes ◽  
Future Directions ◽  
Cell Replacement ◽  
Device Development ◽  
Study Population ◽  
A Cell ◽  
Replacement Device

OBJECTIVES/SPECIFIC AIMS: This study aims to estimate patient attitudes and receptiveness towards stem cell-based cell replacement devices to management Type 1 Diabetes. The primary outcomes of this study are mean response values to questions interrogating patient attitudes, knowledge, and receptiveness. METHODS/STUDY POPULATION: A RedCap survey was generated for this study. 100 participants will be drawn from Mayo Clinic Rochester, MN patients living with Type 1 Diabetes. RESULTS/ANTICIPATED RESULTS: Response values will be used to estimate broader patient attitudes. DISCUSSION/SIGNIFICANCE OF IMPACT: The response values of this survey will help inform future directions of cell replacement device development. Additionally, understanding patient attitudes may be useful in crafting more effective education strategies.

scholarly journals DFT and Minimum Leakage Pattern Generation for Static Power Reduction During Test and Burn-In

2010 ◽  
Vol 18 (3) ◽  
pp. 392-400 ◽  
Author(s):  
Wei-Chung Kao ◽  
Wei-Shun Chuang ◽  
Hsiu-Ting Lin ◽  
James Chien-Mo Li ◽  
Vasco Manquinho
Keyword(s):  
Power Reduction ◽  
Pattern Generation ◽  
Static Power
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