scholarly journals Low Cost Design of a Hybrid Architecture of Integer Inverse DCT for H.264, VC-1, AVS, and HEVC

VLSI Design ◽  
2012 ◽  
Vol 2012 ◽  
pp. 1-10 ◽  
Author(s):  
Muhammad Martuza ◽  
Khan A. Wahid
Keyword(s):  
Video Coding ◽  
Discrete Cosine Transform ◽  
Low Cost ◽  
Hybrid Architecture ◽  
Matrix Operation ◽  
Hardware Cost ◽  
Video Codecs ◽  
Symmetric Structure ◽  
Advanced Video Coding ◽  
Inverse Dct

The paper presents a unified hybrid architecture to compute the 8×8 integer inverse discrete cosine transform (IDCT) of multiple modern video codecs—AVS, H.264/AVC, VC-1, and HEVC (under development). Based on the symmetric structure of the matrices and the similarity in matrix operation, we develop a generalized “decompose and share” algorithm to compute the 8×8 IDCT. The algorithm is later applied to four video standards. The hardware-share approach ensures the maximum circuit reuse during the computation. The architecture is designed with only adders and shifters to reduce the hardware cost significantly. The design is implemented on FPGA and later synthesized in CMOS 0.18 um technology. The results meet the requirements of advanced video coding applications.

scholarly journals Low Cost and High Efficiency Hybrid Architecture Massive MIMO Systems Based on DFT Processing

2018 ◽  
Vol 2018 ◽  
pp. 1-11 ◽  
Author(s):  
Weiqiang Tan ◽  
Guixian Xu ◽  
Elisabeth De Carvalho ◽  
Mu Zhou ◽  
Lisheng Fan ◽  
...  
Keyword(s):  
Energy Consumption ◽  
Massive Mimo ◽  
High Efficiency ◽  
Mimo Systems ◽  
Low Cost ◽  
Phase Shifters ◽  
Hybrid Architecture ◽  
Hardware Cost ◽  
Hybrid Architectures ◽  
Digital Implementation

Low cost and high efficiency, defined as energy efficiency (EE) and spectral efficiency (SE), have raised more and more attention in the fifth generation (5G) communication systems due to steadily rising hardware cost, energy consumption, and mobile traffic. This paper studies the hybrid architecture of multiuser massive MIMO systems, where the digital domain utilizes the zero-forcing (ZF) precoding scheme and the analog domain uses discrete Fourier transform (DFT) processing that significantly reduces hardware cost and energy consumption. We derive analytical expressions on the total achievable SE and EE, as well as offering insight into some engineering parameters in the system performance. Our aim is to achieve low cost and high efficiency massive MIMO system, with constraints on the overall transmit power, the number of users, and the number of radio frequency (RF) chains. Results exhibit that the total achievable SE of the hybrid architectures with DFT precessing is inferior to the full digital architectures and hybrid architectures with the ideal phase shifters, but the performance attenuation can be compensated by providing the more input SNR and higher number of RF chains. Moreover, we find that the total achievable EE of hybrid architectures with DFT precessing outperforms other massive MIMO architectures that include a full digital implementation, ideal phase shifters, and a switched network.

scholarly journals A FLEXIBLE IMAGE PROCESSING DESIGN BASED ON 2D DCT/IDCT FOR A SYSTEM ON A PROGRAMMABLE CHIP

2010 ◽  
pp. 315-319
Author(s):  
Mohamed Atri ◽  
Wajdi Elhamzi ◽  
Rached Tourki
Keyword(s):  
Image Processing ◽  
Object Recognition ◽  
Video Coding ◽  
Discrete Cosine Transform ◽  
Processing Time ◽  
Hardware Acceleration ◽  
Experimental Results ◽  
Software Implementation ◽  
Xilinx Fpga ◽  
Inverse Dct

Many multimedia applications require a flexible image pr ocessing architecture. In this paper, we present the use of a hardware acceleration module (Discrete Cosine Transform (DCT) and Inverse DCT (IDCT) coupled with a software partition running on a PowerPC Processor of a Xilinx FPGA. Therefore we have the benefits of flexible software partition on the PowerPC and the acceleration given by the remaining logic of the same FPGA. This implementation can be used in the context of video coding, object recognition, etc. The experimental results show optimization in processing time offered by hardware acceleration vs. software implementation.

scholarly journals Discrete Sine Transform-Based Interpolation Filter for Video Compression

2017 ◽  
Author(s):  
MyungJun Kim ◽  
Yung-Lyul Lee
Keyword(s):  
Video Coding ◽  
Discrete Cosine Transform ◽  
Video Compression ◽  
High Efficiency ◽  
Random Access ◽  
High Efficiency Video Coding ◽  
Interpolation Filter ◽  
Interpolation Filters ◽  
Low Delay ◽  
Sine Transform

High Efficiency Video Coding (HEVC) uses an 8-point filter and a 7-point filter, which are based on the discrete cosine transform (DCT), for the 1/2-pixel and 1/4-pixel interpolations, respectively. In this paper, discrete sine transform (DST)-based interpolation filters (IF) are proposed. The first proposed DST-based IFs (DST-IFs) use 8-point and 7-point filters for the 1/2-pixel and 1/4-pixel interpolations, respectively. The final proposed DST-IFs use 12-point and 11-point filters for the 1/2-pixel and 1/4-pixel interpolations, respectively. These DST-IF methods are proposed to improve the motion-compensated prediction in HEVC. The 8-point and 7-point DST-IF methods showed average BD-rate reductions of 0.7% and 0.3% in the random access (RA) and low delay B (LDB) configurations, respectively. The 12-point and 11-point DST-IF methods showed average BD-rate reductions of 1.4% and 1.2% in the RA and LDB configurations for the Luma component, respectively.

Broadcast Quality Video Contribution in Mobility

2011 ◽  
pp. 1199-1212
Author(s):  
José Ramón Cerquides Bueno ◽  
Antonio Foncubierta Rodriguez
Keyword(s):  
Video Coding ◽  
Low Cost ◽  
Mobile Telephony ◽  
Continuous Growth ◽  
3G Networks ◽  
Business Opportunities ◽  
Quality Video ◽  
Development Processes ◽  
Mobile Phone Networks ◽  
High Flexibility

The continuous growth of the available throughput, specially in the uplink of mobile phone networks is opening the doors to new services and business opportunities without references in the past. In more concrete, new standards HSDPA/HSUPA, introduced to complement and enhance 3G networks, together with the advances in audio and specially video coding, like those adopted by the standard H.264 AVC have boosted the appearance of a new service: exploiting the mobile telephony networks for contributing broadcast quality videos. This new service is offering just now a low cost, high flexibility alternative that, in a brief period of time, will substitute the current Electronic News Gathering (ENG) Units, giving rise to what is being to be called Wireless Journalism (WENG1 or WiNG2). This chapter discusses both the technologies involved and the business opportunities offered by this sector. Once reviewed the state of the art, different solutions will be compared, some of them recently appeared as commercial solutions, like QuickLink 3.5G Live Encoder3 or AirNow!4 and others still in research and development processes.

scholarly journals A novel two-dimensional reversible data hiding method with high embedding capacity in H.264/advanced video coding

2020 ◽  
Vol 16 (3) ◽  
pp. 155014772091100
Author(s):  
Yi Chen ◽  
Hongxia Wang ◽  
Xiaoxu Tang ◽  
Yong Liu ◽  
Hanzhou Wu ◽  
...  
Keyword(s):  
Video Coding ◽  
Video Compression ◽  
Data Hiding ◽  
Reversible Data Hiding ◽  
Error Concealment ◽  
Similarity Index ◽  
Two Dimensional ◽  
Embedding Capacity ◽  
High Embedding Capacity ◽  
Advanced Video Coding

Developing the technology of reversible data hiding based on video compression standard, such as H.264/advanced video coding, has attracted increasing attention from researchers. Because it can be applied in some applications, such as error concealment and privacy protection. This has motivated us to propose a novel two-dimensional reversible data hiding method with high embedding capacity in this article. In this method, all selected quantized discrete cosine transform coefficients are first paired two by two. And then, each zero coefficient-pair can embed 3 information bits and the coefficient-pairs only containing one zero coefficient can embed 1 information bit. In addition, only one coefficient of each one of the rest coefficient-pairs needs to be changed for reversibility. Therefore, the proposed two-dimensional reversible data hiding method can obtain high embedding capacity when compared with the related work. Moreover, the proposed method leads to less degradation in terms of peak-signal-to-noise ratio, structural similarity index, and less impact on bit-rate increase.

scholarly journals Steerable-Discrete-Cosine-Transform (SDCT): Hardware Implementation and Performance Analysis

Sensors ◽  
2020 ◽  
Vol 20 (5) ◽  
pp. 1405 ◽  
Author(s):  
Riccardo Peloso ◽  
Maurizio Capra ◽  
Luigi Sole ◽  
Massimo Ruo Roch ◽  
Guido Masera ◽  
...  
Keyword(s):  
Video Coding ◽  
Discrete Cosine Transform ◽  
Video Compression ◽  
High Efficiency ◽  
Frame Rate ◽  
High Efficiency Video Coding ◽  
Cosine Transform ◽  
Coding Efficiency ◽  
And Performance ◽  
Efficient Video

In the last years, the need for new efficient video compression methods grown rapidly as frame resolution has increased dramatically. The Joint Collaborative Team on Video Coding (JCT-VC) effort produced in 2013 the H.265/High Efficiency Video Coding (HEVC) standard, which represents the state of the art in video coding standards. Nevertheless, in the last years, new algorithms and techniques to improve coding efficiency have been proposed. One promising approach relies on embedding direction capabilities into the transform stage. Recently, the Steerable Discrete Cosine Transform (SDCT) has been proposed to exploit directional DCT using a basis having different orientation angles. The SDCT leads to a sparser representation, which translates to improved coding efficiency. Preliminary results show that the SDCT can be embedded into the HEVC standard, providing better compression ratios. This paper presents a hardware architecture for the SDCT, which is able to work at a frequency of 188 M Hz , reaching a throughput of 3.00 GSample/s. In particular, this architecture supports 8k UltraHigh Definition (UHD) (7680 × 4320) with a frame rate of 60 Hz , which is one of the best resolutions supported by HEVC.

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