scholarly journals Optimizing Distributed Real-Time Embedded System Handling Dependence and Several Strict Periodicity Constraints

2011 ◽  
Vol 2011 ◽  
pp. 1-19 ◽  
Author(s):  
Omar Kermia
Keyword(s):  
Embedded System ◽  
Real Time ◽  
Execution Time ◽  
Decision Problem ◽  
Schedulability Analysis ◽  
Multiprocessor Scheduling ◽  
Np Hard ◽  
Necessary And Sufficient

This paper focuses on real-time nonpreemptive multiprocessor scheduling with precedence and strict periodicity constraints. Since this problem is NP-hard, there exist several approaches to resolve it. In addition, because of periodicity constraints our problem stands for a decision problem which consists in determining if, a solution exists or not. Therefore, the first criterion on which the proposed heuristic is evaluated is its schedulability. Then, the second criterion on which the proposed heuristic is evaluated is its execution time. Hence, we performed a schedulability analysis which leads to a necessary and sufficient schedulability condition for determining whether a task satisfies its precedence and periodicity constraints on a processor where others tasks have already been scheduled. We also present two multiperiodic applications.

scholarly journals AN INTELLIGENT SCHEDULER APPROACH TO MULTIPROCESSOR SCHEDULING OF APERIODIC TASKS

2012 ◽  
pp. 42-46
Author(s):  
INDURAJ. P. R
Keyword(s):  
Real Time ◽  
Prior Knowledge ◽  
Resource Availability ◽  
Execution Time ◽  
Arrival Time ◽  
Multiprocessor Scheduling ◽  
Multiprocessor System ◽  
Aperiodic Tasks

This paper presents a new scheduler capable of scheduling aperiodic tasks at real time in multiprocessor system. The algorithm proposes a new way to determine dynamically tasks of high priority and low priority finding the elapsed execution time and remaining execution time, and the amount of resource availability and deadline of task, with no prior knowledge of task arrival time and also ensures that no processor remains ideal thus utilizing processors at all times.

scholarly journals An Application based Efficient Thread Level Parallelism Scheme on Heterogeneous Multicore Embedded System for Real Time Image Processing.

2020 ◽  
Vol 21 (1) ◽  
pp. 47-56
Author(s):  
K Indragandhi ◽  
Jawahar P K
Keyword(s):  
Image Processing ◽  
Edge Detection ◽  
Embedded System ◽  
Real Time ◽  
Execution Time ◽  
Image Size ◽  
Multicore Processor ◽  
Detection Scheme ◽  
Thread Level Parallelism ◽  
Level Parallelism

The recent advent of the embedded devices is equipped with multicore processor as it significantly improves the system performance. In order to utilize all the core in multicore processor in an efficient manner, application programs need to be parallelized. An efficient thread level parallelism (ETLP) scheme is proposed in this paper and uses computationally intensive edge detection algorithm for evaluation. Edge detection is the important process in various real time applications namely vehicle detection in traffic control, medical image processing etc. The main objective of ETLP scheme is to reduce the execution time and increase the CPU core utilization. The performance of ETLP scheme is evaluated with basic edge detection scheme (BEDS) for different image size. The experimental results reveal that the proposed ETLP scheme achieves efficiency of 49% and 72% for the image size 300 x 256 and 1024 x 1024 respectively. Furthermore an ETLP scheme reducing 66% execution time for image size 1024 x 1024 when compared with BEDS.

scholarly journals A METHOD OF PREDICTING THE MAINTENANCE PERIOD OF EMBEDDED SYSTEMS FOR PREVENTING BREACH OF THEIR TIME REQUIREMENTS

2018 ◽  
pp. 94-101
Author(s):  
Dmytro Fedasyuk ◽  
Tetyana Marusenkova ◽  
Ratybor Chopey
Keyword(s):  
Embedded Systems ◽  
Response Time ◽  
Embedded System ◽  
Real Time ◽  
Execution Time ◽  
Significant Problem ◽  
Maintenance Period ◽  
Time Requirements ◽  
The Embedded System

The work deals with a significant problem of ensuring that the execution time of a firmware running inside a microcontroller-based real-time embedded system never goes out of its expected range, no matter for how long the embedded system has been used. Once having been tested before the first usage, a newly created embedded system is gradually getting slower in its response, due to the fact that its hardware components get worn-out with aging. A possible solution is a replacement of the hardware components that most contribute to such a change in the response time of the embedded system. If such a replacement takes place too far in advance, long before hardware components actually start showing any decline in their response time, the above-mentioned solution is cost-ineffective and impractical, as it leads to a waste of equipment and efforts. We introduce a method for predicting the appropriate maintenance period of a real-time embedded system on the basis of the characteristics of its hardware components.

scholarly journals A WEAKLY HARD SCHEDULING APPROACH OF PARTITIONED SCHEDULING ON MULTIPROCESSOR SYSTEMS

2015 ◽  
Vol 77 (9) ◽  
Author(s):  
Habibah Ismail ◽  
Dayang N. A. Jawawi
Keyword(s):  
Real Time ◽  
Bin Packing ◽  
Scheduling Algorithm ◽  
Schedulability Analysis ◽  
Packing Problem ◽  
Multiprocessor Scheduling ◽  
Time Task ◽  
Application Systems ◽  
Hard Constraints ◽  
Hard Real Time

Real-time systems or tasks can be classified into three categories, based on the “seriousness” of deadline misses – hard, soft and weakly hard real-time tasks. The consequences of a deadline miss of a hard real-time task can be prohibitively expensive because all the tasks must meet their deadlines whereas soft real-time tasks tolerate “some” deadline misses. Meanwhile, in a weakly hard real-time task, the distribution of its met and missed deadlines is stated and specified precisely.  As real-time application systems increasingly come to be implemented upon multiprocessor environments, thus, this study applies multiprocessor scheduling approach for verification of weakly hard real-time tasks and to guaranteeing the timing requirements of the tasks. In fact, within the multiprocessor, the task allocation problem seem even harder than in uniprocessor case; thus, in order to cater that problem, the sufficient and efficient scheduling algorithm supported by accurate schedulability analysis technique is present to provide weakly hard real-time guarantees. In this paper, a weakly hard scheduling approach has been proposed and schedulability analysis of proposed approach consists of the partitioned multiprocessor scheduling techniques with solutions for the bin-packing problem, called R-BOUND-MP-NFRNS (R-BOUND-MP with next-fit-ring noscaling) combining with the exact analysis, named hyperperiod analysis and deadline models; weakly hard constraints and µ-pattern under static priority scheduling. Then, Matlab simulation tool is used in order to validate the result of analysis. From the evaluation results, it can be proven that the proposed approach outperforms the existing approaches in terms of satisfaction of the tasks deadlines. 

EDZL Scheduling and Schedulability Analysis for Performance Asymmetric Multiprocessors

2016 ◽  
Vol 27 (01) ◽  
pp. 1-14 ◽  
Author(s):  
Peng Wu ◽  
Minsoo Ryu
Keyword(s):  
Real Time ◽  
Schedulability Analysis ◽  
Multiprocessor Scheduling ◽  
Time Requirements ◽  
Schedulability Test ◽  
Improved Performance ◽  
Task Sets ◽  
Reduced Power Consumption ◽  
Time Systems ◽  
Global Edf

Heterogeneous multiprocessor architectures allow embedded real-time systems to better match computing resources to each application's needs and dynamic workload requirements, thereby providing many opportunities for improved performance with reduced power consumption. Unfortunately, guaranteeing real-time requirements on heterogeneous multiprocessors remains a critical problem due to the lack of appropriate scheduling algorithms and analysis methods. In this paper, we consider EDZL (Earliest Deadline First until Zero-Laxity) for performance asymmetric multiprocessor scheduling. EDZL has been shown to outperform other scheduling policies such as global EDF on identical multiprocessors. We show that EDZL is still effective on performance asymmetric multi-processors, and present an efficient EDZL schedulability test. Experimental results show that EDZL scheduling is able to schedule up to 20% more task sets than global EDF and that our new EDZL schedulability test can accept up to 30% more schedulable task sets than a presently exiting one.

scholarly journals A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Learning Outcomes ◽  
Real World ◽  
Time Constraints ◽  
Network Simulator ◽  
Practical Applications ◽  
Rail Network ◽  
Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

scholarly journals Low-Cost Embedded System Using Convolutional Neural Networks-Based Spatiotemporal Feature Map for Real-Time Human Action Recognition

2021 ◽  
Vol 11 (11) ◽  
pp. 4940
Author(s):  
Jinsoo Kim ◽  
Jeongho Cho
Keyword(s):  
Embedded System ◽  
Real Time ◽  
Action Recognition ◽  
Processing Speed ◽  
Recognition Accuracy ◽  
Low Cost ◽  
Human Action Recognition ◽  
Human Action ◽  
Video Data ◽  
Feature Maps

The field of research related to video data has difficulty in extracting not only spatial but also temporal features and human action recognition (HAR) is a representative field of research that applies convolutional neural network (CNN) to video data. The performance for action recognition has improved, but owing to the complexity of the model, some still limitations to operation in real-time persist. Therefore, a lightweight CNN-based single-stream HAR model that can operate in real-time is proposed. The proposed model extracts spatial feature maps by applying CNN to the images that develop the video and uses the frame change rate of sequential images as time information. Spatial feature maps are weighted-averaged by frame change, transformed into spatiotemporal features, and input into multilayer perceptrons, which have a relatively lower complexity than other HAR models; thus, our method has high utility in a single embedded system connected to CCTV. The results of evaluating action recognition accuracy and data processing speed through challenging action recognition benchmark UCF-101 showed higher action recognition accuracy than the HAR model using long short-term memory with a small amount of video frames and confirmed the real-time operational possibility through fast data processing speed. In addition, the performance of the proposed weighted mean-based HAR model was verified by testing it in Jetson NANO to confirm the possibility of using it in low-cost GPU-based embedded systems.

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