scholarly journals High level modeling of Dynamic Reconfigurable FPGAs

2009 ◽  
Vol 2009 ◽  
pp. 1-15 ◽  
Author(s):  
Imran Rafiq Quadri ◽  
Samy Meftali ◽  
Jean-Luc Dekeyser
Keyword(s):  
Embedded Systems ◽  
System Modeling ◽  
Unified Modeling Language ◽  
Modeling And Analysis ◽  
Model Driven ◽  
Fine Grain ◽  
Industry Standard ◽  
On Chip ◽  
High Level ◽  
Abstraction Levels

As System-on-Chip (SoC) based embedded systems have become a defacto industry standard, their overall design complexity has increased exponentially in recent years, necessitating the introduction of new seamless methodologies and tools to handle the SoC codesign aspects. This paper presents a novel SoC co-design methodology based on Model Driven Engineering and the Modeling and Analysis of Real-Time and Embedded Systems (MARTE) standard, permitting us to raise the abstraction levels and allows to model fine grain reconfigurable architectures such as FPGAs. Extensions of this methodology have enabled us to integrate new features such as Partial Dynamic Reconfiguration supported by Modern FPGAs. The overall objective is to carry out system modeling at a high abstraction level expressed in a graphical language like Unified Modeling Language (UML) and afterwards transformation of these models automatically generate the necessary code for FPGA synthesis.

From MARTE to Reconfigurable NoCs

2010 ◽  
pp. 135-157
Author(s):  
Imran Rafiq Quadri ◽  
Majdi Elhaji ◽  
Samy Meftali ◽  
Jean-Luc Dekeyser
Keyword(s):  
System Modeling ◽  
Unified Modeling Language ◽  
Modeling And Analysis ◽  
Unified Modeling ◽  
Model Driven ◽  
Abstraction Level ◽  
Management Group ◽  
High Level Modeling ◽  
High Level ◽  
Abstraction Levels

Due to the continuous exponential rise in SoC’s design complexity, there is a critical need to find new seamless methodologies and tools to handle the SoC co-design aspects. We address this issue and propose a novel SoC co-design methodology based on Model Driven Engineering and the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard proposed by Object Management Group, to raise the design abstraction levels. Extensions of this standard have enabled us to move from high level specifications to execution platforms such as reconfigurable FPGAs. In this chapter, we present a high level modeling approach that targets modern Network on Chips systems. The overall objective: to perform system modeling at a high abstraction level expressed in Unified Modeling Language (UML); and afterwards, transform these high level models into detailed enriched lower level models in order to automatically generate the necessary code for final FPGA synthesis.

Architectural Modelling of Cyber Physical Systems Using UML

2019 ◽  
Vol 1 (2) ◽  
pp. 19-37
Author(s):  
K. Sridhar Patnaik ◽  
Itu Snigdh
Keyword(s):  
System Modeling ◽  
Unified Modeling Language ◽  
Research Area ◽  
Cyber Physical Systems ◽  
Engineering Systems ◽  
Physical Systems ◽  
Unified Modeling ◽  
System Verification ◽  
High Level ◽  
Modeling Representation

Cyber-physical systems (CPS) is an exciting emerging research area that has drawn the attention of many researchers. However, the difficulties of computing and physical paradigm introduce a lot of trials while developing CPS, such as incorporation of heterogeneous physical entities, system verification, security assurance, and so on. A common or unified architecture plays an important role in the process of CPS design. This article introduces the architectural modeling representation of CPS. The layers of models are integrated from high level to lower level to get the general Meta model. Architecture captures the essential attributes of a CPS. Despite the rapid growth in IoT and CPS a general principled modeling approach for the systematic development of these new engineering systems is still missing. System modeling is one of the important aspects of developing abstract models of a system wherein, each model represents a different view or perspective of that system. With Unified Modeling Language (UML), the graphical analogy of such complex systems can be successfully presented.

SystemC Platform Modeling for Behavioral Simulation and Performance Estimation of Embedded Systems

2010 ◽  
pp. 219-243 ◽  
Author(s):  
Hector Posadas ◽  
Juan Castillo ◽  
David Quijano ◽  
Victor Fernandez ◽  
Eugenio Villar ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Design Space Exploration ◽  
Performance Metrics ◽  
System Modeling ◽  
Performance Estimation ◽  
Behavioral Simulation ◽  
Close Interaction ◽  
Accurate Performance ◽  
And Performance ◽  
On Chip

Currently, embedded systems make use of large, multiprocessing systems on chip integrating complex application software running on the different processors in close interaction with the application-specific hardware. These systems demand new modeling, simulation, and performance estimation tools and methodologies for system architecture evaluation and design exploration. Recently approved as IEEE 1666 standard, SystemC has proven to be a powerful language for system modeling and simulation. In this chapter, SCoPE, a SystemC framework for platform modeling, SW source-code behavioral simulation and performance estimation of embedded systems is presented. Using SCoPE, the application SW running on the different processors of the platform can be simulated efficiently in close interaction with the rest of the platform components. In this way, fast and sufficiently accurate performance metrics are obtained for design-space exploration.

Model-Driven Design and ASM-Based Validation of Embedded Systems

2010 ◽  
pp. 24-54 ◽  
Author(s):  
Angelo Gargantini ◽  
Elvinia Riccobene ◽  
Patrizia Scandurra
Keyword(s):  
Embedded System ◽  
Graphical Models ◽  
Code Generation ◽  
Formal Method ◽  
System Level ◽  
Levels Of Abstraction ◽  
Model Driven ◽  
The Embedded System ◽  
On Chip ◽  
High Level

In the embedded system and System-on-Chip (SoC) design area, the increasing technological complexity coupled with requests for more performance and shorter time to market have caused a high interest for new methods, languages and tools capable of operating at higher levels of abstraction than the conventional system level. This chapter presents a model-driven and tool-assisted development process of SoCs, which is based on high-level UML design of system components, guarantees SystemC code generation from graphical models, and allows validation of system behaviors on formal models automatically derived from UML models. An environment for system design and analysis is also presented, which is based on a UML profile for SystemC and the Abstract State Machine formal method.

A model-driven approach to enable the simulation of complex systems on distributed architectures

SIMULATION ◽  
2019 ◽  
Vol 95 (12) ◽  
pp. 1185-1211 ◽  
Author(s):  
Paolo Bocciarelli ◽  
Andrea D’Ambrogio ◽  
Alberto Falcone ◽  
Alfredo Garro ◽  
Andrea Giglio
Keyword(s):  
Modeling And Simulation ◽  
Systems Engineering ◽  
Distributed Simulation ◽  
System Modeling ◽  
Modeling Language ◽  
Design Development ◽  
Simulation Code ◽  
Model Driven ◽  
Final Code ◽  
High Level

The increasing complexity of modern systems makes their design, development, and operation extremely challenging and therefore new systems engineering and modeling and simulation (M&S) methods, techniques, and tools are emerging, also to benefit from distributed simulation environments. In this context, one of the most mature and popular standards for distributed simulation is the IEEE 1516-2010 - Standard for M&S high level architecture (HLA). However, building and maintaining distributed simulations components, based on the IEEE 1516-2010 standard, is still a challenging and effort-consuming task. To ease the development of full-fledged HLA-based simulations, the paper proposes the MONADS method (MOdel-driveN Architecture for Distributed Simulation), which relies on the model-driven systems engineering paradigm. The method takes as input system models specified in Systems Modeling Language, the reference modeling language in the systems engineering field, and produces as output the final code of the corresponding HLA-based distributed simulation through a chain of model-to-model and model-to-text transformations. The obtained simulation code is based on the HLA Development Kit software framework, which has been developed by the SMASH-Lab (System Modeling and Simulation Hub - Laboratory) of the University of Calabria (Italy), in cooperation with the Software, Robotics, and Simulation Division (ER) of NASA’s Lyndon B. Johnson Space Center (JSC) in Houston (TX, USA). The effectiveness of the method is shown through a case study that concerns a military patrol operation, in which a set of drones are engaged to patrol the border of a military area, in order to prevent both ground and flight attacks from entering the area.

High-Level Design Space Exploration of Embedded Systems Using the Model-Driven Engineering and Aspect-Oriented Design Approaches

2010 ◽  
pp. 114-146
Author(s):  
Marcio Ferreira da Silva Oliveira ◽  
Marco Aurelio Wehrmeister ◽  
Francisco Assis do Nascimento ◽  
Carlos Eduardo Pereira
Keyword(s):  
Embedded Systems ◽  
Design Automation ◽  
Design Space Exploration ◽  
Design Space ◽  
Space Exploration ◽  
System Quality ◽  
Model Driven Engineering ◽  
Model Driven ◽  
Level Design ◽  
High Level

Modern embedded systems have increased their functionality by using a large amount and diversity of hardware and software components. Realizing the expected system functionality is a complex task. Such complexity must be managed in order to decrease time-to-market and increase system quality. This chapter presents a method for high-level design space exploration (DSE) of embedded systems that uses model-driven engineering (MDE) and aspect-oriented design (AOD) approaches. The modelling style and the abstraction level open new design automation and optimization opportunities, thus improving the overall results. Furthermore, the proposed method achieves better reusability, complexity management, and design automation by exploiting both MDE and AOD approaches. Preliminary results regarding the use of the proposed method are presented.

Model-Driven Development of Multi-Core Embedded Software

2011 ◽  
pp. 357-379
Author(s):  
Shang-Wei Lin ◽  
Chao-Sheng Lin ◽  
Chun-Hsien Lu ◽  
Yean-Ru Chen ◽  
Pao-Ann Hsiung
Keyword(s):  
Embedded Systems ◽  
Video Recording ◽  
Building Blocks ◽  
Embedded Software ◽  
Programming Environment ◽  
Personal Computing ◽  
Model Driven ◽  
High Level ◽  
Multi Core Processor ◽  
New Framework

Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor based systems is still quite immature and lacks efficient tools. This chapter will propose a new framework called VERTAF/Multi-Core (VMC) and show how software code can be automatically generated from high-level SysML models of multi-core embedded systems. It will also illustrate how model-driven design based on SysML can be seamlessly integrated with Intel’s Threading Building Blocks (TBB) and Quantum Platform (QP) middleware. Finally, this chapter will use a digital video recording (DVR) system to illustrate the benefits of the proposed VMC framework.

Industrial Applications of Emulation Techniques for the Early Evaluation of Secure Low-Power Embedded Systems

2014 ◽  
pp. 328-346
Author(s):  
Norbert Druml ◽  
Manuel Menghin ◽  
Christian Steger ◽  
Armin Krieg ◽  
Andreas Genser ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Low Power ◽  
Network Models ◽  
Industrial Applications ◽  
Early Evaluation ◽  
Traditional System ◽  
Verification Time ◽  
On Chip ◽  
High Level ◽  
Verification Methodology

Embedded systems that follow a secure and low-power design methodology are, besides keeping strict design constraints, heavily dependent on comprehensive test and verification procedures. The large set of possible test vectors and the increasing density of System-on-Chip designs call for the introduction of hardware-accelerated techniques to solve the verification time problem. As already described earlier, emulation-based methodologies based on FPGA evaluation platforms prove capable of providing a solution compared to traditional system simulation. This chapter gives an introduction into a multi-disciplinary emulation-based design evaluation and verification methodology that is based on various techniques that have been presented in chapter 5. Test and verification capabilities are enhanced by the augmentation of this approach using model-based analysis units: gate-level-based power consumption models, power supply network models, event-based performance monitors, and high-level fault modes. The feasible usage of this verification methodology in the field of contactlessly powered smart cards is finally demonstrated using several industrial case studies.

scholarly journals Selected Papers from SLA++P 07 and 08 Model-Driven High-Level Programming of Embedded Systems

2008 ◽  
Vol 2008 (1) ◽  
pp. 376920 ◽  
Author(s):  
Florence Maraninchi ◽  
Michael Mendler ◽  
Marc Pouzet ◽  
Alain Girault ◽  
Eric Rutten
Keyword(s):  
Embedded Systems ◽  
Model Driven ◽  
High Level

scholarly journals An Approach for Power Estimation at Electronic System Level using Distributed Simulation

2016 ◽  
Vol 11 (3) ◽  
pp. 159-170
Author(s):  
Helder F. A. Oliveira ◽  
Alisson V. Brito ◽  
Joseana M. F. R. Araujo ◽  
Elmar U. K. Melcher
Keyword(s):  
Distributed Simulation ◽  
Power Estimation ◽  
Electronic System ◽  
System Level ◽  
Multiprocessor System ◽  
High Level Architecture ◽  
Electronic System Level ◽  
On Chip ◽  
High Level ◽  
Abstraction Levels

The present research aims to develop an approach using HLA (High Level Architecture), enabling the cre-ation of a distributed and heterogeneous environment, composed by different tools and models to obtain a better trade-off between accuracy and run time in power estimation. These models can be described in different languages and/or abstraction levels, as well as use different power estimation approaches. The use of HLA enables the synchronized and distributed simulation of the elements that compose the simulation environment. The approach must allow the collecting and grouping of power estimation data in a centralized manner. As a case study, an MPSoC (MultiProcessor System-on-Chip) ESL/TLM model, described in C++/SystemC, and an ESL model, created on Ptolemy framework, have been used. The experimental results show the flexibility of the approach, which promotes an integrated view of power estimation data.

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