scholarly journals Ka Band Phase Locked Loop Oscillator Dielectric Resonator Oscillator for Satellite EHF Band Receiver

2008 ◽  
Vol 2008 ◽  
pp. 1-6
Author(s):  
S. Coco ◽  
F. Di Maggio ◽  
A. Laudani ◽  
I. Pomona
Keyword(s):  
Dielectric Resonator ◽  
Local Oscillator ◽  
Low Noise ◽  
Noise Performance ◽  
Ka Band ◽  
Phase Noise Performance ◽  
Fundamental Oscillation ◽  
Simulation Results ◽  
Very High ◽  
Good Agreement

This paper describes the design and fabrication of a Ka Band PLL DRO having a fundamental oscillation frequency of 19.250 GHz, used as local oscillator in the low-noise block of a down converter (LNB) for an EHF band receiver. Apposite circuital models have been created to describe the behaviour of the dielectric resonator and of the active component used in the oscillator core. The DRO characterization and measurements have shown very good agreement with simulation results. A good phase noise performance is obtained by using a very highQdielectric resonator.

scholarly journals Hybrid Dielectric Resonator Antenna Composed of High-Permittivity Dielectric Resonator for Wireless Communications in WLAN and WiMAX

2012 ◽  
Vol 2012 ◽  
pp. 1-6 ◽  
Author(s):  
Yih-Chien Chen
Keyword(s):  
Wireless Communications ◽  
Dielectric Resonator ◽  
Simulation Software ◽  
Dielectric Resonator Antenna ◽  
High Permittivity ◽  
Resonant Frequencies ◽  
Rectangular Slot ◽  
Measurement Results ◽  
Simulation Results ◽  
Good Agreement

The-hybrid dielectric resonator antenna consisted of a cylindrical high-permittivity dielectric resonator, a rectangular slot, and two-rectangular patches were implemented. The hybrid dielectric resonator antenna had three resonant frequencies. The lower, middle, and higher resonant frequencies were associated with the rectangular slot, rectangular patches, and dielectric resonator, respectively. Parametric investigation was carried out using simulation software. The proposed hybrid dielectric resonator antenna had good agreement between the simulation results and the measurement results. The hybrid dielectric resonator antenna was implemented successfully for application in 2.4/5.2/5.8 GHz of WLAN and 2.5/3.5/5.5 GHz of WiMAX simultaneously.

Frequency stability and phase noise performance of X‐band to Ka‐band active multiplier

2015 ◽  
Vol 51 (24) ◽  
pp. 2015-2017
Author(s):  
R. Bara‐Maillet ◽  
D.L. Creedon ◽  
S.R. Parker ◽  
J.‐M. Le Floch ◽  
M.E. Tobar
Keyword(s):  
Phase Noise ◽  
Frequency Stability ◽  
Noise Performance ◽  
Ka Band ◽  
X Band ◽  
Phase Noise Performance

A new tail-switching superharmonic multiphase LC-VCO

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Emad Ebrahimi
Keyword(s):  
Phase Noise ◽  
Communication Systems ◽  
Figure Of Merit ◽  
Noise Performance ◽  
Pass Filter ◽  
Content Type ◽  
Voltage Controlled Oscillators ◽  
Coupling Capacitor ◽  
Phase Noise Performance ◽  
Simulation Results

Purpose Multiphase and quadrature voltage-controlled oscillators (QVCOs) play key roles in modern communication systems and their phase noise performance affects the performance of the overall system. Different studies are devoted to efficient quadrature signals generation. This paper aims to present a new low-phase noise superharmonic injection-locked QVCO. Design/methodology/approach The proposed QVCO is comprised of two identical inductor-capacitor circuit (LC)-voltage-controlled oscillators (VCOs) in which second harmonics, with 180° phase shift, are injected from one core VCO to the gate of tail current source of the other VCO via a coupling capacitor. Using second harmonics with high amplitude will switch the tail from the inversion to the accumulation, and therefore, flicker noise is reduced. Also, because of the use of lossless and noiseless coupling elements, that is, coupling capacitors, and also because of the existence of an inherent high-pass filter, the proposed LC-QVCO has a good phase noise performance. Findings The introduced technique is designed and simulated in a commercial 0.18 µm radio frequency complementary metal oxide semiconductor (RF-CMOS) technology and 10 dB improvement of close-in phase noise is achieved (compared to the conventional method). Simulation results show that the phase noise of the proposed QVCO is −130.3 dBc/Hz at 3 MHz offset from 5.76 GHz center frequency, while the total direct current (DC) current drawn from a 0.9-V power supply is 4.25 mA (figure of merit = −190.2 dBc). Monte Carlo simulation results show that the figure of merit of the circuit has a Gaussian distribution with mean value and standard deviation of −189.97 dBc and 0.183, respectively. Originality/value This technique provides a new simple but efficient superharmonic coupling and noise shaping method that reduces close-in phase noise of superharmonic multiphase VCOs by switching of tail transistors with 2 ω0 (second harmonic of oscillation frequency). No extra devices such as area-consuming transformer or additional power-hungry oscillator are used for coupling.

A Current Reused Divided-by-Two Frequency Divider

2013 ◽  
Vol 660 ◽  
pp. 119-123
Author(s):  
Xiao Shi ◽  
Fu Qing Huang ◽  
Zhi Lin Liu ◽  
Jian Hui Wu
Keyword(s):  
Process Simulation ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Frequency Divider ◽  
Cmos Process ◽  
Noise Performance ◽  
Low Power Dissipation ◽  
Phase Noise Performance ◽  
Simulation Results ◽  
A Current

In this paper, a low power dissipation divide-by-two frequency divider is presented. The master latch and the slave latch of the divide-by-two frequency divider are stacked in cascode to reuse the current. The frequency divider can operate with only half the current of a conventional divider. A divide-by-two frequency divider based on the proposed topology is designed and simulated in a 0.18μm 1P6M CMOS process. Simulation results show the frequency divider can operate up to 11GHz with only 0.66mW power dissipation under 1.8V supply voltage. And it also demonstrates good phase noise performance.

scholarly journals K/Ka-Band Very High Data-Rate Receivers: A Viable Solution for Future Moon Exploration Missions

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 349 ◽  
Author(s):  
Federico Alimenti ◽  
Paolo Mezzanotte ◽  
Luca Roselli ◽  
Valentina Palazzi ◽  
Stefania Bonafoni ◽  
...  
Keyword(s):  
Software Defined Radio ◽  
System Analysis ◽  
Data Rate ◽  
Low Noise ◽  
High Data Rate ◽  
Ka Band ◽  
High Data ◽  
Front End ◽  
Moon Exploration ◽  
Very High

This paper presents a feasibility study for a very high data rate receiver operating in the K/Ka-band suitable to future Moon exploration missions. The receiver specifications are outlined starting from the mission scenario and from a careful system analysis. The designed architecture uses a low noise front-end to down-convert the incoming K/Ka-band signal into a 3.7 GHz intermediate frequency (IF). For maximum flexibility, a software defined radio (SDR) is adopted for the I/Q demodulation and for the analog to digital conversion (ADC). The decoding operations and the data interface are carried out by a processor based on field programmable gate array (FPGA) circuits. To experimentally verify the above concepts, a preliminary front-end breadboard is implemented, operating between 27.5 and 30 GHz. The breadboard, which uses components off the shelf (COTS) and evaluation boards (EVBs), is characterized by a 46 dB gain, a 3.4 dB noise figure and a − 37 dBm input-referred 1 dB compression point. Finally, a 40 Msym / s quadrature phase shift keying (QPSK) signal is demodulated by means of a commercially available SDR, demonstrating the above concept. The importance of these results is that they have been obtained exploiting a class of miniaturized and low cost microwave integrated circuits currently available on the market, opening the way to a dense communication infrastructure on cislunar space.

scholarly journals Comparison of System-Level Design Approaches on Different Types of Digitally-Controlled Ring-Oscillator

Technologies ◽  
2021 ◽  
Vol 9 (2) ◽  
pp. 38
Author(s):  
Santthosh Selvaraj ◽  
Erkan Bayram ◽  
Renato Nega
Keyword(s):  
High Stability ◽  
Cmos Technology ◽  
Ring Oscillator ◽  
System Level ◽  
Digital Controller ◽  
Noise Performance ◽  
Different Types ◽  
Digitally Controlled ◽  
Phase Noise Performance ◽  
Simulation Results

This paper presents a comparative study between two different implementations of digitally-controlled-oscillators (DCOs), whcih is the DAC-based and the digital controller-based DCO in TSMC 65 nm CMOS technology. This paper focuses on ring-oscillator architectures due to their high stability against PVT. The DAC-based oscillator implements a differential architecture, and the digital controller-based architecture operates in a single-ended signal. The SFDR of the DAC-based DCO is 77.2 dBc and controller-based DCO is 56.8 dBc at 125 MHz offset. The Monte-Carlo simulation gives a deviation of 7.4% and 8.5% for the DAC-based and controller-based DCO, respectively. The phase noise performance of the DAC-based DCO and controller-based DCO is −78.9 dBc/Hz and −81.3 dBc/Hz at 1 MHz offset, respectively. The implementations are given and compared according to their performance based on post-layout simulation results.

Dislocation structures around SiO2 Particles in aged Cu-Cr-SiO2

1978 ◽  
Vol 36 (1) ◽  
pp. 594-595
Author(s):  
N.J. Long ◽  
M.H. Loretto ◽  
C.H. Lloyd
Keyword(s):  
Flow Stress ◽  
Single Crystals ◽  
Room Temperature ◽  
Thin Foil ◽  
Age Hardening ◽  
Dispersion Strengthening ◽  
Accurate Picture ◽  
The Matrix ◽  
Very High ◽  
Good Agreement

IntroductionThere have been several t.e.m. studies (1,2,3,4) of the dislocation arrangements in the matrix and around the particles in dispersion strengthened single crystals deformed in single slip. Good agreement has been obtained in general between the observed structures and the various theories for the flow stress and work hardening of this class of alloy. There has been though some difficulty in obtaining an accurate picture of these arrangements in the case when the obstacles are large (of the order of several 1000's Å). This is due to both the physical loss of dislocations from the thin foil in its preparation and to rearrangement of the structure on unloading and standing at room temperature under the influence of the very high localised stresses in the vicinity of the particles (2,3).This contribution presents part of a study of the Cu-Cr-SiO2 system where age hardening from the Cu-Cr and dispersion strengthening from Cu-Sio2 is combined.

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