scholarly journals Power-conscious Scheduling for Real-time Embedded Systems Design

VLSI Design ◽  
2001 ◽  
Vol 12 (2) ◽  
pp. 139-150 ◽  
Author(s):  
Youngsoo Shin ◽  
Kiyoung Choi ◽  
Takayasu Sakurai
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Systems Design ◽  
Optimization Method ◽  
Efficient Design ◽  
Power Efficient ◽  
On Line ◽  
Time Variations ◽  
Processor Speed ◽  
Programmable Processors

Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. We address a power optimization method for real-time embedded applications on a variable speed processor. The method combines off-line and on-line components. The off-line component determines the lowest possible maximum processor speed while guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor speed or bring a processor into a power-down mode to exploit execution time variations and idle intervals. Experimental results show that the proposed method obtains a significant power reduction across several kinds of applications.

scholarly journals Evaluating High-Level Models for Real Time Embedded Systems Design

2004 ◽  
pp. 277-286 ◽  
Author(s):  
Lisane Brisolara ◽  
Leandro B. Becker ◽  
Luigi Carro ◽  
Flávio R. Wagner ◽  
Carlos Eduardo Pereira
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Systems Design ◽  
High Level

Large Data Stream Processing - Embedded Systems Design Challenges

2010 ◽  
Vol 56 (2) ◽  
pp. 107-110 ◽  
Author(s):  
Adam Handzlik ◽  
Andrzej Jabłonski
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Data Stream ◽  
High Speed ◽  
Stream Processing ◽  
Systems Design ◽  
Large Data ◽  
Data Stream Processing ◽  
Huge Data ◽  
Design Challenges

Large Data Stream Processing - Embedded Systems Design Challenges The following paper describes an application of reconfigurable hardware architectures for processing of huge data streams. Radar, sonar and high speed internet networks are typical sources of data that require extreme computing power and resources to enable real time acquisition, processing and management. An approach to monitoring of real time multi-gigabit internet network has been described as a practical application of FPGA based board, designed for fast data processing.

scholarly journals A Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block Formation

2016 ◽  
Vol 12 (4) ◽  
pp. 1-25 ◽  
Author(s):  
Morteza Mohajjel Kafshdooz ◽  
Mohammadkazem Taram ◽  
Sepehr Assadi ◽  
Alireza Ejlali
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Optimization Method ◽  
Time Optimization ◽  
Block Formation

Task Scheduling under Uncertain Timing Constraints in Real-Time Embedded Systems

2013 ◽  
pp. 211-235 ◽  
Author(s):  
Pranab K. Muhuri ◽  
K. K. Shukla
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Task Scheduling ◽  
Resource Constraints ◽  
Systems Design ◽  
Task Completion ◽  
Timing Constraints ◽  
Timing Constraint ◽  
Processing Times ◽  
And Task

In real-time embedded systems, timeliness of task completion is a very important factor. In such systems, correctness of the output depends on the timely production of results in addition to the logical outcome of computation. Thus, tasks have explicit timing constraints besides other characteristics of general systems, and task scheduling aims towards devising a feasible schedule of the tasks such that timing constraints, resource constraints, precedence constraints, etc. are complied. In real-time embedded systems, the most important timing constraint of a task is the deadline, as tasks must be completed within this time. The next important timing constraint is the processing time, because a task occupies a processor only for this duration of time. However, in the early phase of real-time embedded systems design only an approximate idea of the tasks and their characteristics are known. As a result, uncertainty or impreciseness is associated with the task deadlines and processing times; hence, it is appropriate to use fuzzy numbers to model deadlines and processing times in real-time embedded systems. The chapter introduces a new method using mixed cubic-exponential Hermite interpolation technique for intuitively defining smooth Membership Functions (MFs) for fuzzy deadlines and processing times. The effect of changes in parameterized MFs on the task schedulability and task priorities are explained. Examples are given to demonstrate the significant features and better performance of the new technique.

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