scholarly journals An Integrated Approach to Data Path Synthesis for Behavioral-level Power Optimization

VLSI Design ◽  
2000 ◽  
Vol 11 (4) ◽  
pp. 381-396
Author(s):  
Chaeryung Park ◽  
Taewhan Kim ◽  
C. L. Liu
Keyword(s):  
Integer Programming ◽  
Power Consumption ◽  
Efficient Algorithm ◽  
Integrated Approach ◽  
Data Path ◽  
Programming Formulation ◽  
Prior Work ◽  
Design Problems ◽  
Path Synthesis ◽  
Important Design

This paper presents an integrated approach to data path synthesis which solves three important design problems: scheduling, allocation, and hardware partitioning with power minimization as a key design objective. Based on the rules of thumbs introduced in prior work on synthesis for low power we derive an integer programming formulation for solving the problems. We then, based on the formulation, develop an efficient algorithm which performs scheduling, allocation and hardware partitioning simultaneously so that the effects of them on power consumption are exploited more fully and effectively. Our experimentation results show that the algorithm is quite effective, producing designs with significant savings in power consumption.

scholarly journals A New ALU Design using PNS-FCR: Static CMOS Logic for Microprocessors

2019 ◽  
Vol 8 (6S2) ◽  
pp. 876-882
Keyword(s):  
Power Consumption ◽  
Integrated Circuit ◽  
Design Methodology ◽  
Total Power ◽  
Data Path ◽  
Power Efficient ◽  
Efficient Data ◽  
Main Component ◽  
Static Logic ◽  
Important Design

Arithmetic Logic Unit (ALU) is the main component in the processors. Most important design consideration in integrated circuit is power. In all the components of ALU data path is the active one and it consumes more percent of power in the total power. In the modern microprocessors it is important to have power efficient data paths. To reduce the power consumption in microprocessors the ALU is designed using PNS-FCR static CMOS logic. In this paper static CMOS logic is used to reduce power consumption. Static technique does not need any clock. So it leads to less power consumption. For the implementation of the ALU with the PNS-FCR static logic mentor graphics tool is used. The power consumption of ALU is compared with and without using FCR. An 8-bit ALU is designed in mentor graphics with 130nm technology. The proposed design methodology gives less power consumption

scholarly journals Optimal Hierarchical Decomposition Synthesis Using Integer Programming

1996 ◽  
Author(s):  
Ramprasad S. Krishnamachari ◽  
Panos Y. Papalambros
Keyword(s):  
Integer Programming ◽  
Optimal Design ◽  
Pressure Vessel ◽  
Synthesis Process ◽  
Disc Brake ◽  
Hierarchical Decomposition ◽  
Programming Formulation ◽  
Design Problems ◽  
Optimal Partitioning ◽  
Speed Reducer

Abstract Decomposition synthesis in optimal design is the process of creating an optimal design model by selecting objectives and constraints so that it can be directly partitioned into an appropriate decomposed form. Such synthesis results are not unique since there may be many partitions that satisfy the decomposition requirements. Introducing suitable criteria an optimal decomposition synthesis process can be defined in a manner analogous to optimal partitioning formulations. The article presents an integer programming formulation and solution techniques for synthesizing hierarchically decomposed optimal design problems. Examples for designing a pressure vessel, an automotive caliper disc brake and a speed reducer are also presented.

Integrated Kinematic and Dynamic Optimal Design of Flexible Planar Mechanisms

1987 ◽  
Vol 109 (3) ◽  
pp. 338-347 ◽  
Author(s):  
A. J. Kakatsios ◽  
S. J. Tricamo
Keyword(s):  
Cross Sections ◽  
High Speed ◽  
Integrated Approach ◽  
Programming Formulation ◽  
Kinematic Parameters ◽  
Planar Mechanisms ◽  
Disturbing Force ◽  
Design Requirements ◽  
Path Synthesis ◽  
Flexible Mechanisms

The following describes a new integrated approach to the problem of designing high speed mechanisms. Employing a nonlinear programming formulation, it allows both the kinematic parameters and the link cross sections to vary while simultaneously bounding trajectory accuracy and minimizing the disturbing force on the ground. Furthermore, link stresses are bounded to limits imposed by the designer. The technique is capable of taking into account the complex coupling which exists between kinematic and dynamic characteristics in flexible mechanisms to determine linkage parameters which best satisfy a given set of design requirements. A path synthesis problem is used to illustrate the technique.

scholarly journals Optimal Hierarchical Decomposition Synthesis Using Integer Programming

1997 ◽  
Vol 119 (4) ◽  
pp. 440-447 ◽  
Author(s):  
R. S. Krishnamachari ◽  
P. Y. Papalambros
Keyword(s):  
Integer Programming ◽  
Optimal Design ◽  
Pressure Vessel ◽  
Synthesis Process ◽  
Disc Brake ◽  
Hierarchical Decomposition ◽  
Programming Formulation ◽  
Design Problems ◽  
Optimal Partitioning ◽  
Speed Reducer

Decomposition synthesis in optimal design is the process of creating an optimal design model by selecting objectives and constraints so that it can be directly partitioned into an appropriate decomposed form. Such synthesis results are not unique since there may be many partitions that satisfy the decomposition requirements. Introducing suitable criteria an optimal decomposition synthesis process can be defined in a manner analogous to optimal partitioning formulations. The article presents an integer programming formulation and solution techniques for synthesizing hierarchically decomposed optimal design problems. Examples for designing a pressure vessel, an automotive caliper disc brake and a speed reducer are also presented.

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